Image sensor device and operation method thereof

An image sensor device comprising:

• a control circuit configured to output a first control signal and a clamp selection signal;
• a row decoder configured to output a reset signal, a transfer signal, and a selection signal based on the first control signal;
• a pixel configured to operate based on a first power supply voltage, to operate in response to the reset signal, the transfer signal, and the selection signal such that a first pixel signal is output to a first column line during a first time period and a second pixel signal is output to the first column line during a second time period;
• and
• a clamp circuit configured to operate based on a second power supply voltage that is lower than the first power supply voltage and to output a first clamp signal to the first column line during the first time period;
• and
• a voltage regulator configured to generate the second power supply voltage based on the first power supply voltage,
• wherein the pixel includes:
• a photodiode configured to integrate charges in response to a light signal;
• a transfer transistor connected between the photodiode and a floating diffusion node, and configured to operate in response to the transfer signal;
• a reset transistor connected between a first power supply voltage and the floating diffusion node, and configured to operate in response to the reset signal;
• a drive transistor connected between the first power supply voltage and a 0-th node, and configured to operate in response to a voltage of the floating diffusion node;
• and
• a select transistor connected between the 0-th node and the first column line, and configured to operate in response to the selection signal,
• wherein the clamp circuit includes:
• a clamp transistor connected between a second power supply voltage and a first node, and configured to operate in response to a clamp control signal;
• and
• a clamp select transistor connected between the first node and the first column line, and configured to operate in response to the clamp selection signal,
• wherein the clamp transistor is turned on during the first time period,
• wherein during the first time period, a voltage of the clamp control signal is higher than the second power supply voltage, and
• wherein, during the first time period, a reset sampling operation is performed based on a voltage of the first column line.