Methods and apparatuses for facilitating de-rate matching of bits of transmitted symbols formed after a rate matching procedure

A receiver for facilitating de-rate matching of bits of symbols formed after a rate matching procedure from a transmitter, wherein the transmitter selected Z bits from channel-coded bits, and then generated E bits by concatenation of the Z bits and their copies for the rate matching procedure, and every Q bits formed a symbol, the receiver comprising:

• a demodulator, for demodulating the symbols to obtain E soft bits corresponding to the E bits;
• a memory, having Z consecutive locations corresponding to bit positions of the Z bits, wherein values at the Z consecutive locations are zeroed before the following additions;
• a buffer device, for writing the E soft bits;
• an adder, for each soft bit of the E soft bits in the buffer device, for directly adding value of the soft bit and value from a corresponding location of the Z consecutive locations and storing result of the addition back into the location, wherein a bit in the E bits corresponding to the soft bit is a bit in the Z bits corresponding to the location or a copy of the bit in the Z bits;
• and
• a restorer, for restoring the Z bits from the final results at the Z consecutive locations,
• wherein assuming i represents the index of a soft bit in the sequence of the E soft bits, and K represents the offset used when selecting the Z bits in the rate matching procedure, the index of the location relating to the addition for the soft bit in the Z consecutive locations is f−floor(f/Z)×Z, where f=K+(i−floor(i/Q)×Q)×(E/Q)+floor (i/Q), wherein floor(X) is a function which maps the real number X to the greatest integer less than or equal to X.