Error correction circuit

An error correction circuit comprising:

• a syndrome generation circuit configured to generate a first odd syndrome, a first even syndrome, and a second syndrome by using an error correction code that is implemented as an H-matrix;
• a location information generation circuit configured to generate odd symbol location information and even symbol location information, based on the first odd syndrome, the first even syndrome, and the second syndrome;
• and
• a correction data generation circuit configured to generate correction data by correcting an error included in data, based on the first odd syndrome, the first even syndrome, the odd symbol location information, and the even symbol location information,
• wherein the correction data generation circuit is configured to correct, when it is determined that an error has occurred in a first odd-numbered symbol based on the first odd syndrome and an error has occurred in a first even-numbered symbol that is consecutive to the first odd-numbered symbol based on the first even syndrome, the error included in data of the first odd-numbered symbol and the error included in data of the first even-numbered symbol based on the first odd syndrome, the first even syndrome, and the odd symbol location information.

An error correction circuit comprising:

• a syndrome generation circuit configured to generate a first odd syndrome, a first even syndrome, and a second syndrome by using an error correction code that is implemented as an H-matrix;
• a location information generation circuit configured to generate odd symbol location information and even symbol location information, based on the first odd syndrome, the first even syndrome, and the second syndrome;
• and
• a correction data generation circuit configured to generate correction data by correcting an error included in data based on the first odd syndrome, the first even syndrome, the odd symbol location information, and the even symbol location information,
• wherein first, second, and third rows of the H-matrix correspond to first, second, and third blocks, respectively,
• the first block comprises unit matrices corresponding to odd-numbered symbols, respectively, and zero matrices corresponding to even-numbered symbols, respectively,
• the second block comprises zero matrices corresponding to the odd-numbered symbols, respectively, and unit matrices corresponding to the even-numbered symbols, respectively, and
• the third block comprises sub-matrices each comprising each of odd-numbered elements corresponding to the odd-numbered symbols, respectively, as a representative element and sub-matrices each comprising each of even-numbered elements corresponding to the even-numbered symbols, respectively, as a representative element.

An error correction circuit comprising:

• a syndrome generation circuit configured to generate a first odd syndrome, a first even syndrome, and a second syndrome based on data;
• a location information generation circuit configured to generate odd symbol location information and even symbol location information, based on the first odd syndrome, the first even syndrome, and the second syndrome;
• and
• a correction data generation circuit configured to correct an error when the error occurs in symbols corresponding to sub-matrices each comprising each of elements having a specific distance difference as a representative element on a left side in relation to a central axis in an H-matrix based on the first odd syndrome, the first even syndrome, the odd symbol location information, and the even symbol location information and configured to correct an error when the error occurs in symbols corresponding to sub-matrices each comprising each of elements having a specific distance difference as a representative element on a right side in relation to the central axis,
• wherein the sub-matrices included in the H-matrix correspond to the symbols, respectively.