Non-volatile memory and rewrite control method thereof
AssigneeRenesas Electronics Corporation
InventorsMasami Hanyu, Yoshihiro Nagai, Hirofumi Ooga
Life of this patent
Estimating the term…
Abstract
The present invention provides a non-volatile memory system capable of suppressing excessive stress to normal cells and ensuring data retention margin of normal cells. In one embodiment of the non-volatile memory system, it determines whether or not error correction is possible for addresses judged to fail in the erase verify process, counts the number of addresses determined to be error-correctable, and if the number of such addresses is less than or equal to a predetermined number, the erase process is determined to be normal.
Claims12
A non-volatile memory system comprising:
- a non-volatile memory including a data cell and an error correction code cell corresponding to each address;
- and
- a controller circuit configured to perform bulk erasing process for multiple addresses of the non-volatile memory and perform a verifying process that determines whether the erasing process passes or fails for each address,
- wherein the controller circuit determines availability of an error correction for addresses determined to fail in the verifying process, counts a number of addresses determined that the error correction is available, and determines that the erasing process is normal when the number of the addresses which is available to the error correction is equal to or less than a predetermined number.
A non-volatile memory rewrite control method, comprising:
- (a) performing a bulk erasing process for multiple addresses of a non-volatile memory including a data cell and an error correction code cell for each address;
- (b) performing an erase verifying process that determines whether the erasing process passes or fails for each address;
- (c) determining, for addresses determined to fail in the erase verifying process, whether error correction is available;
- (d) counting a number of addresses determined to be the error correction is available;
- and
- (e) determining, when the number of addresses which the error correction is available is equal to or less than a predetermined number, that the erasing process is normal.
Dependencies are inferred from the claim text.