Switched-capacitor circuit with reduced thermal noise
AssigneeBoard of Regents, The University of Texas System
InventorChiu Yun
Life of this patent
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Abstract
A switched-capacitor circuit includes a sample and hold stage including an input coupled to a circuit input and including an output. The circuit includes an amplification stage including an input coupled to the output of the sample and hold stage and including an output. The circuit includes an output stage including an input coupled to the output of the amplification stage and an output coupled to the circuit output. The circuit includes a feedback stage including a first terminal coupled to the circuit output, a second terminal coupled to the input of the amplification stage and including a third terminal.
Claims21
A switched-capacitor circuit, comprising:
- a circuit input;
- a circuit output;
- a sample and hold stage including an input coupled to the circuit input and including an output;
- an amplification stage including an input coupled to the output of the sample and hold stage and including an output;
- an output stage including an input coupled to the output of the amplification stage and an output coupled to the circuit output;
- a feedback stage including a first terminal coupled to the circuit output, a second terminal coupled to the input of the amplification stage, and including a third terminal;
- a first noise cancellation stage having differential inputs coupled to the sample and hold stage and an output coupled to the output of the amplification stage;
- and
- a second noise cancellation stage including a first terminal coupled to the third terminal of the feedback stage and a second terminal coupled to the output of the amplification stage, wherein the sample and hold stage comprises:
- a first switch including a first terminal coupled to the circuit input and including a second terminal;
- a second switch including a first terminal coupled to the second terminal of the first switch and a second terminal coupled to a reference potential;
- a first sampling capacitor including a first terminal coupled to the second terminal of the first switch and including a second terminal;
- and
- a third switch including a first terminal coupled to the second terminal of the first sampling capacitor and a second terminal coupled to the reference potential.
A switched-capacitor circuit comprising:
- a circuit input;
- a circuit output;
- a first switch including a first terminal coupled to the circuit input and including a second terminal;
- a second switch including a first terminal coupled to the second terminal of the first switch and including a second terminal coupled to a reference potential;
- a first sampling capacitor including a first terminal coupled to the second terminal of the first switch and including a second terminal;
- a third switch including a first terminal coupled to the second terminal of the sampling capacitor and a second terminal coupled to the reference potential;
- a first operational amplifier including a non-inverting input coupled to the second terminal of the first sampling capacitor, an inverting input coupled to the reference potential and including an output;
- a second sampling capacitor including a first terminal coupled to the output of the first operational amplifier and including an output;
- a fourth switch including a first terminal coupled to the second terminal of the second sampling capacitor and a second terminal coupled to the reference potential;
- a second operational amplifier including a non-inverting input coupled to the first terminal of the first switch, an inverting input coupled to the second terminal of the first switch, and an output coupled to the output of the first operational amplifier;
- a third operational amplifier including an inverting input coupled to the second terminal of the second sampling capacitor, a non-inverting input coupled to the reference potential and an output coupled to the circuit output;
- and
- a feedback circuit including a first terminal coupled the circuit output and a second terminal coupled to the non-inverting input of the first operational amplifier.
A switched-capacitor circuit comprising:
- a circuit input;
- a circuit output;
- a first switch including a first terminal coupled to the circuit input and including a second terminal;
- a second switch including a first terminal coupled to the second terminal of the first switch and including a second terminal coupled to a reference potential;
- a first sampling capacitor including a first terminal coupled to the second terminal of the first switch and including a second terminal;
- a third switch including a first terminal coupled to the second terminal of the sampling capacitor and a second terminal coupled to the reference potential;
- a first operational amplifier including a non-inverting input coupled to the second terminal of the first sampling capacitor, an inverting input coupled to the reference potential and including an output;
- a second sampling capacitor including a first terminal coupled to the output of the first operational amplifier and including an output;
- a fourth switch including a first terminal coupled to the second terminal of the second sampling capacitor and a second terminal coupled to the reference potential;
- a second operational amplifier including a non-inverting input coupled to the first terminal of the first switch, an inverting input coupled to the second terminal of the first switch, and an output coupled to the output of the first operational amplifier;
- a third operational amplifier including an inverting input coupled to the second terminal of the second sampling capacitor, a non-inverting input coupled to the reference potential and an output coupled to the circuit output;
- and
- a fourth operational amplifier including a non-inverting input coupled to the second terminal of a feedback capacitor, an inverting input coupled to the reference potential and an output coupled to the output of the first operational amplifier.
A switched-capacitor circuit, comprising:
- a circuit input;
- a circuit output;
- a sample and hold stage including an input coupled to the circuit input and including an output;
- an amplification stage including an input coupled to the output of the sample and hold stage and including an output;
- an output stage including an input coupled to the output of the amplification stage and an output coupled to the circuit output;
- a feedback stage including a first terminal coupled to the circuit output, a second terminal coupled to the input of the amplification stage, and including a third terminal;
- a first noise cancellation stage having differential inputs coupled to the sample and hold stage and an output coupled to the output of the amplification stage;
- and
- a second noise cancellation stage including a first terminal coupled to the third terminal of the feedback stage and a second terminal coupled to the output of the amplification stage,
- wherein the sample and hold stage comprises:
- a first switch including a first terminal coupled to the circuit input and including a second terminal;
- a second switch including a first terminal coupled to the second terminal of the first switch and a second terminal coupled to a reference potential;
- a first sampling capacitor including a first terminal coupled to the second terminal of the first switch and including a second terminal;
- and
- a third switch including a first terminal coupled to the second terminal of the first sampling capacitor and a second terminal coupled to the reference potential, and
- wherein the first noise cancellation stage comprises an operational amplifier including a non-inverting input coupled to the first terminal of the first switch, an inverting input coupled to the second terminal of the first switch, and an output coupled to the output of the amplification stage, and wherein the operational amplifier is configured to receive a differential input signal from the first switch.
Dependencies are inferred from the claim text.