Local staling parameter for cache memory management in a processor

A method comprising:

• choosing a subject cache line from a plurality of cache lines in a shared cache memory wherein each of the plurality of cache lines includes a plurality of memory words, a stale parameter bit, a client parameter bit and a local staling parameter bit, wherein each of the plurality of memory words stores active data, the stale parameter bit indicates validity of the active data, the client parameter bit indicates ownership and the local staling parameter bit indicates replacement or eviction policy of the each of the plurality of cache lines;
• determining that the stale parameter bit is set to 1 and that the local staling parameter bit is set to 1 for the subject cache line;
• and
• declaring that the subject cache line is available for replacement or eviction only by an owner client and only when the stale parameter and the local staling parameter bit are set to 11.

An apparatus for cache memory management, the apparatus comprising:

• means for choosing a subject cache line from a plurality of cache lines in a shared cache memory wherein each of the plurality of cache lines includes a plurality of memory words, a stale parameter bit, a client parameter bit and a local staling parameter bit, wherein each of the plurality of memory words stores active data, the stale parameter bit indicates validity of the active data, the client parameter bit indicates ownership and the local staling parameter bit indicates replacement or eviction policy of the each of the plurality of cache lines;
• means for determining that the stale parameter bit is set to 1 and that the local staling parameter bit is set to 1 for the subject cache line;
• and
• means for declaring that the subject cache line is available for replacement or eviction only by an owner client and only when the stale parameter and the local staling parameter bit are set to 11.

A non-transitory computer-readable medium storing computer executable code, operable on a device comprising at least one processor and at least one memory coupled to the at least one processor, wherein the at least one processor is configured to implement cache memory management, the computer executable code comprising:

• instructions for causing a computer to choose a subject cache line from a plurality of cache lines in a shared cache memory wherein each of the plurality of cache lines includes a plurality of memory words, a stale parameter bit, a client parameter bit and a local staling parameter bit, wherein each of the plurality of memory words stores active data, the stale parameter bit indicates validity of the active data, the client parameter bit indicates ownership and the local staling parameter bit indicates replacement or eviction policy of the each of the plurality of cache lines;
• instructions for causing the computer to determine that the stale parameter bit is set to 1 and that the local staling parameter bit is set to 1 for the subject cache line;
• instructions for causing the computer to set the local staling parameter bit for a remaining each cache line of the plurality of cache lines to indicate a local staling state for the remaining each cache line of the plurality of cache lines;
• and
• instructions for causing the computer to declare that the subject cache line is available for replacement or eviction only by an owner client and only when the stale parameter and the local staling parameter bit are set to 11.