US 12,631,471 B1Granted

Replacement scheme for map checkpoints

AssigneeApple Inc.

InventorRustam Miftakhutdinov

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Abstract

Techniques are disclosed pertaining to a replacement scheme for map checkpoints. A processor of a computer system receives an instruction to be executed. The processor updates the state of a map structure to map a set of logical registers specified by the instruction to a set of physical registers. The processor then stores a first map checkpoint that corresponds to the updated state of the map structure and is usable by the processor to restore the map structure to the updated state. The storing of the first map checkpoint can include the processor selecting a second map checkpoint from a set of stored map checkpoints based on a non-first in, first out replacement scheme. The second map checkpoint may thus be selected out of order relative to an order in which the set of stored map checkpoints were stored. The second map checkpoint is overridden with the first map checkpoint.

Claims20

Dependent claims

An apparatus, comprising:

a computer processor that includes:
a plurality of physical registers, a given one of which is configured to store a value;
fetch circuitry configured to fetch instructions;
and
map circuitry coupled to the fetch circuitry and configured to:
maintain a map structure that maps a set of logical registers specified by an instruction to a set of the plurality of physical registers of the computer processor;
store a set of map checkpoints, wherein a given one of the set of map checkpoints corresponds to a state of the map structure at a particular point in a dynamically changing out-of-order execution window and is usable by the computer processor to roll back the map structure to the state at the particular point;
assign a tier value to a given map checkpoint of the set of map checkpoints based on a sequence of a repeating series of tier values;
and
based at least in part on a detection that the set of map checkpoints includes a threshold number of map checkpoints, select and replace a first one of the set of map checkpoints with a second map checkpoint in accordance with a non-first in, first out (non-FIFO) replacement scheme that alters relative spacing of the set of map checkpoints within the dynamically changing out-of-order execution window, wherein the first map checkpoint is selected based on a tier value assigned to the first map checkpoint.

7 more elements

A non-transitory computer readable medium having stored thereon design information that specifies a circuit design in a format recognized by a fabrication system that is configured to use the design information to fabricate a hardware integrated circuit that comprises:

a plurality of physical registers, a given one of which is configured to store a value;
fetch circuitry configured to fetch instructions;
and
map circuitry coupled to the fetch circuitry and configured to:
maintain a map structure that maps a set of logical registers specified by an instruction to a set of the plurality of physical registers of the hardware integrated circuit;
generate a first map checkpoint corresponding to a state of the map structure at a particular point in an execution path, wherein the first map checkpoint enables the hardware integrated circuit to roll back the map structure to the state at the particular point;
and
replace a previously stored second map checkpoint with the first map checkpoint in accordance with a replacement scheme that replaces map checkpoints at least partially out of order relative to an order in which the map checkpoints are stored.

5 more elements

Dependencies are inferred from the claim text.