Semiconductor package and manufacturing method thereof
AssigneeNanya Technology Corporation
InventorWu-Der Yang
Life of this patent
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Abstract
The present disclosure is related to a semiconductor package. The semiconductor package includes a substrate and a semiconductor chip. The substrate includes a window through a center portion of the substrate, in which the substrate has an inner sidewall surrounding the window and a conductive foil located on a top surface of the substrate, in which the conductive foil extends beyond the inner sidewall of the substrate. The semiconductor chip is located on the top surface of the substrate, in which the conductive foil is located between the substrate and the semiconductor chip, and the semiconductor chip has a bonding pad electrically connected to the conductive foil.
Claims12
A semiconductor package, comprising:
- a substrate, comprising:
- a window through a center portion of the substrate, wherein the substrate has an inner sidewall surrounding the window;
- and
- a conductive foil located on a top surface of the substrate, wherein the conductive foil extends beyond the inner sidewall of the substrate, the conductive foil has a horizontal portion in direct physical contact and vertically overlapping the top surface of the substrate, and there is no molding compound between the horizontal portion of the conductive foil and the top surface of the substrate;
- and
- a semiconductor chip located on the top surface of the substrate, wherein the conductive foil is located between the substrate and the semiconductor chip, and the semiconductor chip has a bonding pad electrically connected to the conductive foil.
Dependencies are inferred from the claim text.