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US 12,628,686 B2Granted
Techniques to enable a flip chip underfill exclusion zone
AssigneeIntel Corporation
InventorsRonald Spreitzer, Jason Garcia, Ankur Agrawal, Eleanor Patricia Paras Rabadam, Guiyun Bai
Life of this patent
Estimating the term…
Abstract
Example techniques to enable a flip chip underfill exclusion zone include use of bump barriers, films or etched substrate cavities to prevent underfill from reaching the flip chip underfill exclusion zone.
Claims22
A microelectronic assembly comprising:
- a die substrate to include a component, the component to have an area on a flip chip side of the die substrate identified as an underfill exclusion zone;
- a plurality of die bumps on the flip chip side to enable the die substrate to electrically couple to a carrier substrate that is configured to route signals received through the plurality of die bumps;
- and
- a film barrier deposited on the die substrate to cover at least a perimeter around the underfill exclusion zone such that an underfill material, when used to improve a solder joint reliability of the die bumps, is prevented from reaching to the underfill exclusion zone, wherein the film barrier is deposited on the die substrate as a lithographic film deposited in one or more layers to reach a thickness that substantially matches a height of the plurality of die bumps, and wherein the lithographic film is to be deposited over a surface that also covers the underfill exclusion zone, the lithographic film to be deposited over the surface such that an additional width of lithographic film deposited over the surface is sufficient to prevent the underfill material from flowing underneath the additional width of lithographic film and reaching the underfill exclusion zone.
1 more element
A method for assembling at least a portion of a microelectronic assembly, comprising:
- identifying an area on a flip chip side of a die substrate as an underfill exclusion zone for a component included in the die substrate;
- and
- depositing a film barrier on the die substrate to cover at least a perimeter around the underfill exclusion zone such that an underfill material, when used to improve a solder joint reliability of die bumps, is prevented from reaching the underfill exclusion zone, wherein the film barrier is deposited on the die substrate as a lithographic film in one or more layers to reach a thickness that substantially matches a height of a plurality of die bumps on the flip chip side of the die substrate that are arranged to enable the die substrate to electrically couple to a carrier substrate, and wherein the lithographic film is deposited over a surface that also covers the underfill exclusion zone, the lithographic film to be deposited over the surface such that an additional width of lithographic film deposited over the surface is sufficient to prevent the underfill material from flowing underneath the additional width of lithographic film and reaching the underfill exclusion zone.
A microelectronic assembly comprising:
- a die substrate to include a component, the component to have an area on a flip chip side of the die substrate identified as an underfill exclusion zone;
- a plurality of die bumps on the flip chip side to enable the die substrate to electrically couple to a carrier substrate that is configured to route signals received through the plurality of die bumps;
- and
- a bump barrier to include a plurality of bumps arranged around the underfill exclusion zone such that an underfill material, when used to improve a solder joint reliability of the plurality of die bumps, is prevented from reaching the underfill exclusion zone, wherein the plurality of bumps are arranged around the underfill exclusion zone as a perimeter wall of a single bump thickness, each bump in the perimeter wall arranged to not contact bumps on either side, wherein a distance between each bump in the perimeter wall is close enough to prevent the underfill material from flowing far enough to reach the underfill exclusion zone.
1 more element
A microelectronic assembly comprising:
- a die substrate to include a component, the component to have an area on a flip chip side of the die substrate identified as an underfill exclusion zone;
- a plurality of die bumps on the flip chip side to enable the die substrate to electrically couple to a carrier substrate that is configured to route signals received through the plurality of die bumps;
- and
- a low modulus film deposited on the die substrate to cover the underfill exclusion zone such that an underfill material, when used to improve a solder joint reliability of the plurality of die bumps, is prevented from flowing to the underfill exclusion zone.
1 more element
A microelectronic assembly comprising:
- a die substrate to include a component, the component to have an area on a flip chip side of the die substrate identified as an underfill exclusion zone;
- a plurality of die bumps on the flip chip side to enable the die substrate to electrically couple to a carrier substrate that is configured to route signals received through the plurality of die bumps;
- and
- a substrate cavity on the carrier substrate located below the underfill exclusion zone such that an underfill material, when used to improve a solder joint reliability of the plurality of die bumps, is prevented from contacting the underfill exclusion zone due to the underfill material flowing into the substrate cavity.
1 more element
Dependencies are inferred from the claim text.