Chip-scale package architectures containing a die back side metal and a solder thermal interface material
AssigneeIntel Corporation
InventorsSusmriti Das Mahapatra, Malavarayan Sankarasubramanian, Shenavia Howell, John Harper, Mitul Modi
Life of this patent
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Abstract
An integrated circuit (IC) package comprising a die having a front side and a back side. A solder thermal interface material (STIM) comprising a first metal is over the backside. The TIM has a thermal conductivity of not less than 40 W/mK; and a die backside material (DBM) comprising a second metal over the STIM, wherein the DBM has a CTE of not less than 18×10−6 m/mK, wherein an interface between the STIM and the DBM comprises at least one intermetallic compound (IMC) of the first metal and the second metal.
Claims22
An integrated circuit (IC) package structure, comprising:
- a die having a front side and a backside;
- a first material comprising a first metal over the backside, wherein the first material comprises a plurality of filler particles embedded within the first metal;
- and
- a second material comprising a second metal over the first material, wherein an interface between the first material and the second material comprises at least one intermetallic compound (IMC) of the first metal and the second metal, and wherein the second material has a first z-height and the first material has a second z-height less than the first z-height, wherein the first z-height is 500 microns or less, and the second z-height is 150 microns or less.
An integrated circuit (IC) package structure, comprising:
- a die having a front side and a backside;
- a first material comprising a first metal over the backside, wherein the first material has a thermal conductivity of not less than 40 W/mK;
- a second material comprising a second metal over the first material, wherein the second material has a coefficient of thermal expansion (CTE) of not less than 18×10−6 m/mK;
- and
- a third material over the second material, wherein a first interface between the first material and the second material comprises a first intermetallic compound (IMC) of the first metal and the second metal, and wherein a second interface between the first material and the third material comprises a second IMC.
An integrated circuit (IC) package structure, comprising:
- a die having a front side and a backside;
- a first material comprising a first metal over the backside, wherein the first material comprises a plurality of filler particles embedded within the first metal;
- a second material comprising a second metal over the first material;
- and
- a third material over the second material, wherein an interface between the first material and the second material comprises a first intermetallic compound (IMC) of the first metal and the second metal, and wherein a second interface between the first material and the third material comprises a second IMC.
Dependencies are inferred from the claim text.