Transistor device
AssigneeInfineon Technologies Austria AG
InventorMichael Hutzler
Life of this patent
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Abstract
In an embodiment, a transistor device includes: a support layer having a first major surface and a second major surface opposing the first major surface; a source contact arranged on the first major surface of the support layer; a drain contact arranged on the second major surface of the support layer; and a gate electrode arranged in a first trench formed in the first major surface of the support layer. The first trench has a base and a side wall extending from the base to the first major surface. The drain contact is arranged under the base of the first trench. A region with gate-controlled conductivity is formed between the source contact and the drain contact. The region with gate-controlled conductivity is formed in an organic semiconductor layer.
Claims16
A transistor device, comprising:
- a support layer having a first major surface and a second major surface opposing the first major surface;
- a source contact arranged on the first major surface of the support layer;
- a drain contact arranged on the second major surface of the support layer;
- a gate electrode arranged in a first trench formed in the first major surface of the support layer, the first trench having a base and a side wall extending from the base to the first major surface, wherein the drain contact is arranged under the base of the first trench;
- and
- a region with gate-controlled conductivity formed between the source contact and the drain contact, wherein the region with gate-controlled conductivity is formed in an organic semiconductor layer.
A method for fabricating a transistor device, the method comprising:
- forming a drain contact on a drain layer;
- forming an organic semiconductor layer on the drain contact;
- forming a source contact on the organic semiconductor layer;
- forming a source layer on the source contact;
- forming a first trench that extends through the source layer, the source contact and into the organic semiconductor layer, the first trench having a base and a side wall;
- forming a gate dielectric layer on the base and the side wall of the first trench;
- and
- forming a gate electrode on the gate dielectric layer in the first trench.
A method for fabricating a transistor device, the method comprising:
- forming a drain contact on a drain layer;
- forming a dielectric layer on the drain contact;
- forming a source contact on the dielectric layer;
- forming a source layer on the source contact;
- forming a first trench that extends through the source layer, the source contact and into the dielectric layer, the first trench having a base and a side wall;
- forming an organic semiconductor layer on the base and the side wall of the first trench;
- forming a gate dielectric layer on the organic semiconductor layer;
- and
- forming a gate electrode on the gate dielectric layer in the first trench.
Dependencies are inferred from the claim text.