Package dies including vertical interconnects for signal and power distribution in a three-dimensional (3D) integrated circuit (IC) package

A method of fabricating a three-dimensional (3D) integrated circuit (IC) package, comprising forming a first package die, comprising:

• forming a plurality of vertical interconnects extending through the first package die in a first direction between a first side of the first package die and a second side of the first package die;
• forming a distribution layer comprising horizontal interconnects extending in a second direction orthogonal to the first direction, the distribution layer disposed on metallization layers on the first side of the first package die and coupled to the plurality of vertical interconnects;
• forming first die contacts disposed on the first side of the first package die and coupled to the horizontal interconnects;
• forming second die contacts disposed on the second side of the first package die, coupled to the plurality of vertical interconnects, and configured to couple to a second package die;
• forming a first semiconductor substrate, wherein the first side of the first package die comprises a first side of the first semiconductor substrate;
• and
• forming a first active circuit layer on the first side of the first semiconductor substrate and comprising:
• secondary circuit blocks, each comprising primary circuit blocks, wherein each of the primary circuit blocks comprises a memory array circuit;
• primary separation lanes disposed between the primary circuit blocks within each of the secondary circuit blocks;
• and
• secondary separation lanes disposed between the secondary circuit blocks,
• wherein:
• the secondary separation lanes are wider than the primary separation lanes;
• and
• the metallization layers are disposed on the first active circuit layer.