A method for controlling a semiconductor memory device,
- the semiconductor memory device including:
- a bit line extending in a first direction;
- a source line;
- a memory cell array including
- a memory string including a plurality of memory cell transistors connected in series, the memory cell transistors including a first memory cell transistor and a second memory cell transistor,
- a first selection transistor connected between the bit line and the memory string, and
- a second selection transistor connected between the memory string and the source line;
- a plurality of word lines each extending in the second direction crossing the first direction, and being arranged in a third direction crossing the first direction and the second direction, the word lines being connected to gate electrodes of the memory cell transistors, respectively, the word lines including
- a first word line connected to the gate electrode of the first memory cell transistor, and
- a second word line connected to the gate electrode of the second memory cell transistor;
- a first selection line connected to a gate electrode of the first selection transistor;
- and
- a second selection line connected to a gate electrode of the second selection transistor,
- the method including
- performing a program operation to the first memory cell transistor,
- wherein
- at a first timing of the program operation,
- a first voltage is applied to the first word line,
- a second voltage lower than the first voltage is applied to the second word line,
- a third voltage lower than the first voltage is applied to the first selection line, and
- a fourth voltage lower than the seventh voltage is applied to the second selection line,
- at a second timing after the first timing of the program operation,
- a fifth voltage lower than the first voltage is applied to the first word line,
- a sixth voltage lower than the first voltage is applied to the second word line,
- a seventh voltage higher than the third voltage is applied to the first selection line, and
- an eighth voltage higher than the fourth voltage is applied to the second selection line,
- at a third timing after the second timing of the program operation,
- a ninth voltage lower than the first voltage is applied to the first word line,
- a tenth voltage lower than the first voltage is applied to the second word line,
- an eleventh voltage lower than the seventh voltage is applied to the first selection line, and
- a twelfth voltage lower than the eighth voltage is applied to the second selection line, and
- at a fourth timing after the third timing of the program operation,
- a thirteenth voltage lower than the ninth voltage is applied to the first word line,
- a fourteenth voltage lower than the tenth voltage is applied to the second word line,
- a fifteenth voltage lower than the seventh voltage is applied to the first selection line, and
- a sixteenth voltage lower than the eighth voltage is applied to the second selection line.