Associating physical design metrics of a circuit design with register transfer level representations of the circuit design

A non-transitory computer readable medium comprising stored instructions, which when executed by a processor device, cause the processor device to:

• access first metrics from a first design description of an integrated circuit, wherein the first design description includes a layout level design, and the first metrics are dependent on the layout level design;
• and
• determine second metrics for a second design description of the integrated circuit, wherein the second design description includes a RTL source code for the integrated circuit without specification of a physical layout of the integrated circuit, and determining the second metrics comprises:
• determining a mapping of which sub-circuits from the first design description correspond to which register transfer level source elements, wherein the RTL source elements are portions of the RTL source code for the integrated circuit;
• and
• aggregating the first metrics for the RTL source elements, based on the mapping between sub-circuits in the first design description and the RTL source elements of the second design description.

A system, comprising:

• a memory storing instructions;
• and
• a processor device, coupled with the memory and to execute the instructions, the instructions when executed cause the processor device to display a user interface, the user interface comprising:
• first elements that display RTL source elements, which are portions of the RTL source code for the integrated circuit;
• and
• second elements indicative of aggregated physical design metrics corresponding to the RTL source elements;
• wherein the aggregated physical design metrics are aggregated from physical design metrics for sub-circuits from a layout level design of the integrated circuit based on a mapping of which sub-circuits correspond to which RTL source elements, the physical design metrics are metrics that depend on the layout level design, and the aggregated physical design metrics and corresponding RTL source elements are displayed in a manner that associates the aggregated physical design metrics with the corresponding RTL source elements.