Device and a method for performing a cryptographic algorithm

A non-transitory computer readable medium comprising computer readable code configured to cause a computer device to perform process of method, the computer device comprising a first processor and a processing module, wherein the processing module comprises a further processor implementing a first instruction set architecture, the first instruction set architecture comprising machine code instructions, comprising:

• obtaining, by the first processor, first data, comprising a representation of computer program code that embodies a cryptographic algorithm;
• obtaining, by the first processor, second data;
• receiving, by the first processor, a request for a first mechanism to be performed, the request comprising:
• information identifying the first mechanism;
• information identifying the first data as corresponding to a program;
• and
• information identifying the second data as corresponding to an input;
• transmitting, by the first processor, to the processing module, a second request for the first mechanism to be performed, the second request comprising:
• information identifying the first mechanism;
• information identifying the first data as corresponding to the program;
• and
• information identifying the second data as corresponding to the input;
• and
• executing, by the processing module, the program represented in the first data taking the second data as the input, wherein the processing module further comprises:
• an instruction memory configured to store the machine code instructions;
• and
• a masking component, being implemented in a hardware, comprising a first input and a second input,
• wherein the first input of the masking component is coupled to an output of the instruction memory and the second input of the masking component is configured to receive an indication that the program is being executed, and
• wherein the masking component, in response to receiving the indication that the program is being executed, is configured to mask the machine code instructions from the first instruction set architecture that are not part of a subset of approved machine code instructions.

A device comprising:

• a first processor;
• and
• a processing module, wherein the processing module comprises a further processor implementing a first instruction set architecture, the first instruction set architecture comprising machine code instructions;
• the first processor being configured to:
• obtain first data, comprising a representation of computer program code that embodies a cryptographic algorithm;
• obtain second data;
• receive a request for a first mechanism to be performed, the request comprising information identifying the first mechanism, information identifying the first data as corresponding to a program, and information identifying the second data as corresponding to an input;
• and
• transmit to the processing module a second request for the first mechanism to be performed, the second request comprising information identifying the first mechanism, information identifying the first data as corresponding to the program, and information identifying the second data as corresponding to the input;
• the processing module being configured to:
• execute the program represented in the first data taking the second data as the input, wherein the processing module further comprises:
• an instruction memory configured to store the machine code instructions;
• and
• a masking component, being implemented in a hardware, comprising a first input and a second input,
• wherein the first input of the masking component is coupled to an output of the instruction memory and the second input of the masking component is configured to receive an indication that the program is being executed, and
• wherein the masking component, in response to receiving the indication that the program is being executed, is configured to mask the machine code instructions from the first instruction set architecture that are not part of a subset of approved machine code instructions.