Delayed cache entry invalidation update for potential overwrite re-use

A method, comprising:

• performing, by a computing system, operations on input operand data from a first-level cache, including a first operation that reads first data from an entry in the first-level cache and signals an invalidation of the first data;
• setting, by the computing system, an indicator, in response to the first operation, to indicate that the entry in the first-level cache has a pending invalidation;
• and
• clearing, by the computing system in response to a second operation overwriting the entry in the first-level cache while the indicator is set, the indicator without invalidating a corresponding entry in a second-level cache, wherein the second-level cache is a write-back cache and is inclusive of data from locations cached in the first-level cache.

A non-transitory computer-readable medium having instructions stored thereon that are executable by a computing device to perform operations comprising:

• compiling a program for execution by a processor that includes a first-level cache and a second-level cache, including:
• generating a first operation that reads first data and signals an invalidation of the first data;
• and
• generating a second operation, subsequent to the first operation in program order, including selecting a destination for the second operation to overwrite the first data;
• wherein the processor includes control circuitry configured to:
• read the first data from an entry in the first-level cache for the first operation;
• set an indicator, in response to the first operation, to indicate that the entry in the first-level cache has a pending invalidation;
• and
• in response to the second operation overwriting the entry in the first-level cache while the indicator is set, clear the indicator without invalidating a corresponding entry in the second-level cache.