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US 12,625,808 B2Granted
Cache memory supporting data operations with parametrized latency and throughput
AssigneeMicrosoft Technology Licensing, LLC
InventorsAhmed Abdelsalam, Vishalkumar Shantilal Gondaliya, Anshuman Verma, Robert Groza, Jr., Dongwook Lee, Ezzeldin Hamed
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Abstract
The present disclosure relates to a cache memory and methods that handle data forwarding from the cache memory to an action block to perform an action on the data. The action block performs an action on the data and outputs modified data in response to performing the action. The cache memory and methods use a latency parameter for data forwarding to prevent data hazards from occurring and to meet timing requirements and performance requirements of the cache memory.
Claims8
A method, comprising:
- receiving, at a cache memory, a cache input request for data;
- determining the data is in the cache memory;
- providing, in response to the cache input request, the data to an action block based on a latency parameter of an action performed by the action block, wherein the latency parameter identifies a number of clock cycles to complete the action by the action block;
- and
- receiving, from the action block, modified data in response to the action block performing the action on the data, wherein the modified data is output in a plurality of pipeline stages based on a cycles per operation parameter that identifies a throughput of the action block performing the action and a number of pipeline stages in the plurality of pipeline stages is equal to the number of clock cycles of the latency parameter.
2 more elements
Dependencies are inferred from the claim text.