Data processing method, apparatus, and system, computing device, and storage medium
AssigneeHuawei Technologies Co., Ltd.
InventorsRutao Zhang, Di Yu, Kai Hou
Life of this patent
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Abstract
The present disclosure relates to data processing methods, computer devices, and non-transitory computer-readable storage media. In an example method, at least one processor obtains an instruction sequence of an application program, identifies an execution sequence of read/write instructions in the instruction sequence based on the instruction sequence, and executes the read/write instructions based on the identified execution sequence.
Claims20
A method for data processing, wherein the method is performed by at least one processor of a computing device, and the method comprises:
- obtaining an instruction sequence of an application program, wherein the instruction sequence comprises a plurality of instructions, the plurality of instructions comprise read/write instructions for performing at least one of a read operation or a write operation on one or more memories of the computing device, and the application program is deployed in the computing device;
- identifying an execution sequence of the read/write instructions based on the instruction sequence;
- and
- executing the read/write instructions based on the execution sequence, wherein:
- the read/write instructions comprise at least one of a read instruction for performing the read operation on the one or more memories or a write instruction for performing the write operation on the one or more memories, the read instruction has a first semantic, and the write instruction has a second semantic,
- the first semantic indicates that a first instruction in the instruction sequence is executed after the read instruction is executed, wherein the first semantic prevents any instruction that is arranged after the read instruction in the instruction sequence from being executed before the read instruction is executed;
- and
- the second semantic indicates that a second instruction in the instruction sequence is executed before execution of the write instruction is completed, wherein the second semantic prevents any instruction that is arranged before the write instruction in the instruction sequence from being executed after the write instruction is executed,
- the read instruction is fetched through compiling an extended memory read instruction, the extended memory read instruction has the first semantic, and the extended memory read instruction is an instruction that is added to an instruction set of the at least one processor and that is used to instruct to read memory data;
- and
- the write instruction is fetched through compiling an extended memory write instruction, the extended memory write instruction has the second semantic, and the extended memory write instruction is an instruction that is added to the instruction set and that is used to instruct to write the memory data.
A computer device, comprising:
- at least one processor;
- and
- one or more memories coupled to the at least one processor and storing programming instructions for execution by the at least one processor to perform operations comprising:
- obtaining an instruction sequence of an application program, wherein the instruction sequence comprises a plurality of instructions, the plurality of instructions comprise read/write instructions for performing at least one of a read operation or a write operation on the one or more memories of the computing device, and the application program is deployed in the computing device;
- identifying an execution sequence of the read/write instructions based on the instruction sequence;
- and
- executing the read/write instructions based on the execution sequence, wherein:
- the read/write instructions comprise at least one of a read instruction for performing the read operation on the one or more memories or a write instruction for performing the write operation on the one or more memories, the read instruction has a first semantic, and the write instruction has a second semantic,
- the first semantic indicates that a first instruction in the instruction sequence is executed after the read instruction is executed, wherein the first semantic prevents any instruction that is arranged after the read instruction in the instruction sequence from being executed before the read instruction is executed;
- and
- the second semantic indicates that a second instruction in the instruction sequence is executed before execution of the write instruction is completed, wherein the second semantic prevents any instruction that is arranged before the write instruction in the instruction sequence from being executed after the write instruction is executed,
- the read instruction is fetched through compiling an extended memory read instruction, the extended memory read instruction has the first semantic, and the extended memory read instruction is an instruction that is added to an instruction set of the at least one processor and that is used to instruct to read memory data;
- and
- the write instruction is fetched through compiling an extended memory write instruction, the extended memory write instruction has the second semantic, and the extended memory write instruction is an instruction that is added to the instruction set and that is used to instruct to write the memory data.
A non-transitory computer-readable storage medium, wherein the non-transitory computer-readable storage medium stores at least one piece of program code, and the at least one piece of program code is read by at least one processor of a computing device, to enable the at least one processor to:
- obtain an instruction sequence of an application program, wherein the instruction sequence comprises a plurality of instructions, the plurality of instructions comprise read/write instructions for performing at least one of a read operation or a write operation on one or more memories of the computing device, and the application program is deployed in the computing device;
- identify an execution sequence of the read/write instructions based on the instruction sequence;
- and
- execute the read/write instructions based on the execution sequence, wherein:
- the read/write instructions comprise at least one of a read instruction for performing the read operation on the one or more memories or a write instruction for performing the write operation on the one or more memories, the read instruction has a first semantic, and the write instruction has a second semantic,
- the first semantic indicates that a first instruction in the instruction sequence is executed after the read instruction is executed, wherein the first semantic prevents any instruction that is arranged after the read instruction in the instruction sequence from being executed before the read instruction is executed;
- and
- the second semantic indicates that a second instruction in the instruction sequence is executed before execution of the write instruction is completed, wherein the second semantic prevents any instruction that is arranged before the write instruction in the instruction sequence from being executed after the write instruction is executed,
- the read instruction is fetched through compiling an extended memory read instruction, the extended memory read instruction has the first semantic, and the extended memory read instruction is an instruction that is added to an instruction set of the at least one processor and that is used to instruct to read memory data;
- and
- the write instruction is fetched through compiling an extended memory write instruction, the extended memory write instruction has the second semantic, and the extended memory write instruction is an instruction that is added to the instruction set and that is used to instruct to write the memory data.
Dependencies are inferred from the claim text.