A method for efficiently performing operations on input data to compute an interpretable and differentiable function implemented by a circuit, the method comprising:
- obtaining, by at least one first level processing unit of the circuit, one or more first level inputs, wherein each first level input is associated with a first level weight;
- computing, by the at least one first level processing unit, a first level weighted sum of the one or more first level inputs by multiplying each first level input by the associated first level weight to compute a first level product and adding the computed first level products, wherein the first level weighted sum is the weighted sum of the first-level inputs;
- computing, by the at least one first level processing unit, a first level output by performing a logarithmic operation on the first level weighted sum, wherein the first level output is the logarithm of the first-level weighted sum of the first level inputs;
- performing a skip connection to obtain, by at least one second level processing unit of the circuit, one or more second level inputs by selecting from among at least one of (i) the one or more first level inputs of each first level processing unit (ii) the first level weighted sum of each first level processing unit and (iii) the first level output of each first level processing unit, wherein each second level input is associated with a second level weight;
- computing, by the at least one second level processing unit, a second level weighted sum of the one or more second level inputs by multiplying each second level input with the associated second level weight to compute a second level product, and adding the computed second level product, wherein the second level weighted sum is a weighted sum of the second level inputs;
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- computing, by the at least one second level processing unit, a second level output by performing an antilog operation on the second level weighted sum, wherein the second level output is a product of weighted polynomials of the first level inputs or a product of (i) weighted polynomials of the one or more first level inputs and (ii) weighted exponentials of the one or more first level inputs and (iii) weighted exponentials of the one or more first level weighted sum of the first level processing units, wherein the second level output is the interpretable and differentiable function, wherein circuit comprises a memory that is configured to store (i) the first level inputs, the first level weights, the first level weighted sums, the first level output of each first level processing unit, and (ii) the second level inputs, the second level weights, the second level weighted sums, and the second level output of each second level processing unit;
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- initializing, by a first set of instructions and a second set of instructions in the memory, the weights of the one or more first level inputs and the one or more second level inputs to compute the second-level output corresponding to the one or more first level inputs;
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- orchestrating, by a control unit of the circuit, the first set of instructions and the second set of instructions of the circuit.