Interconnects with sidewall barrier layer divot fill

An interconnect structure, comprising:

• a first interlayer dielectric disposed on a wafer;
• at least one metal line embedded in the first interlayer dielectric, wherein a top surface of the at least one metal line is recessed below a top surface of the first interlayer dielectric;
• a metal cap disposed on the at least one metal line;
• a second interlayer dielectric disposed on the first interlayer dielectric;
• at least one conductive via embedded in the second interlayer dielectric, wherein the at least one conductive via is aligned with the at least one metal line;
• a barrier layer along a bottom and a first portion of a sidewall of the at least one metal line;
• and
• a protective dielectric layer along a second portion of the sidewall of the at least one metal line, wherein the barrier layer and the protective dielectric layer fully separate the at least one metal line from the first interlayer dielectric, and wherein a top surface of the protective dielectric layer directly contacts a bottom surface of the metal cap.