US 12,622,180 B2 · Bias-level sensors for reciprocal quantum logic

Abstract

Reciprocal quantum logic (RQL) bias-level sensors are fabricated on an RQL integrated circuit (IC) to sample AC or DC bias values provided to operational RQL circuitry on the RQL IC. The bias-level sensors, or samplers, include Josephson transmission lines (JTLs) or logic gates having strengthened or weakened bias taps as compared to bias taps of JTLs or logic gates in the operational RQL circuitry. Sampler JTLs or logic gates with weakened bias taps to AC clock resonators can have lower limits of their operational ranges placed near an optimal bias point at the centroid of the operating region of the operational RQL circuitry. Staging relative strengths of the bias taps of the samplers in an ensemble of samplers allows for outputs of wrapper circuitry to be indicative of whether a provided bias value is an improvement or optimization of the bias value when varied over a range.

Claims20

Dependent claims

A reciprocal quantum logic (RQL) system comprising:

an RQL integrated circuit (IC) comprising:
operational RQL circuitry configured to perform one or more computational functions, the operational RQL circuitry comprising a first Josephson transmission line (JTL) or logic gate inductively coupled to a bias signal source via a first bias tap to provide biasing to the first JTL or logic gate;
and
bias-level sensing circuitry configured to sense one or more parameters of bias signals provided to the operational RQL circuitry, the bias-level sensing circuitry comprising a second JTL or logic gate inductively coupled to the bias signal source via a second bias tap to provide biasing to the second JTL or logic gate,
wherein the coupling to the bias signal source of the second JTL or logic gate differs in strength relative to the coupling to the bias signal source of the first JTL or logic gate.

2 more elements

A method of calibrating bias signals provided to operational reciprocal quantum logic (RQL) circuitry in an RQL integrated circuit (IC), the method comprising:

inputting a sample signal to RQL AC bias sampler wrapper circuitry comprising a plurality of RQL AC bias samplers, more than one of the plurality of AC bias samplers comprising at least one Josephson transmission line (JTL) or logic gate coupled to mutual inductances of a first bias tap via a first network having a self-inductance that is larger than a self-inductance of a second network that couples a JTL or logic gate in the operational RQL circuitry to mutual inductances of a second bias tap;
observing an output of the AC bias sampler wrapper circuitry;
varying an amplitude of an AC clock signal provided to the operational RQL circuitry via the AC clock resonator;
and
determining that the varying the amplitude of the AC clock signal has moved the amplitude of the AC clock signal closer to an optimal bias point of the operational RQL circuitry.

2 more elements

Dependencies are inferred from the claim text.

Bias-level sensors for reciprocal quantum logic

Life of this patent

Bias-level sensors for reciprocal quantum logic

Life of this patent

Abstract

Claims20