Variable resistance memory device

A variable resistance memory device comprising:

• a support layer including an insulating material;
• a variable resistance layer on the support layer and including a variable resistance material;
• a capping layer between the support layer and the variable resistance layer, the capping layer being configured to protect the variable resistance layer;
• a channel layer on the variable resistance layer;
• a gate insulating layer on the channel layer;
• and
• a plurality of gate electrodes and a plurality of insulators alternately and repeatedly arranged on the gate insulating layer in a first direction parallel with the channel layer, wherein
• the variable resistance layer includes a silicon oxide layer contacting the channel layer and the variable resistance material on the silicon oxide layer.