Methods for 3D-integrating photonic chipsets by vertical assembly of lasers and passive components

A method for making a vertically arranged array of edge-emitting lasers, said method comprising:

• (a) obtaining a plurality of semiconductor chips, wherein said semiconductor chips are laser diodes or semiconductor optical amplifiers;
• (b) coating each of said semiconductor chips on multiple sides with a thermally conductive dielectric material;
• (c) bonding said semiconductor chips onto a carrier wafer at selected locations, wherein said semiconductor chips are vertically aligned relative to a surface of said carrier wafer;
• (d) coating each of said semiconductor chips with an electroplating seed material;
• (e) obtaining a body wafer having lithographically defined and passivated openings within a plane of said body wafer;
• (f) positioning said body wafer and said carrier wafer to match said lithographically defined and passivated openings with said semiconductor chips;
• (g) electroplating a metal-containing material onto said electroplating seed material to fill open space between said semiconductor chips and said lithographically defined and passivated openings;
• (h) demounting said body wafer from said carrier wafer;
• (i) etching excess material, if any, from said body wafer;
• and
• (j) patterning a plurality of metal regions in electrical contact with said plurality of semiconductor chips,
• thereby generating a vertically arranged array of edge-emitting lasers that is capable of emitting laser light parallel to said semiconductor chips and perpendicular to said plane of said body wafer.