Memory system, debugging device, debugging method of memory system, and method of operating memory system
AssigneeSamsung Electronics Co., Ltd.
InventorsBumju Kim, Jaecheon Kim
Life of this patent
Estimating the term…
Abstract
A memory system includes: a memory device configured to store a plurality of data items; a scan chain configured to receive the plurality of data items and to generate scan-out data for the plurality of data items; and a controller configured to replace the scan-out data with replaced data. The scan chain is further configured to receive the replaced data from the controller.
Claims19
A memory system comprising:
- a memory device configured to store a plurality of data items;
- a processor configured to generate a replacement command based on a determination that an error exists in at least one data item of the plurality of data items;
- a controller configured to receive the replacement command from the processor and to replace a first data value of the at least one data item of the plurality of data items with a second data value based on the replacement command;
- and
- a scan chain configured to receive the plurality of data items including the second data value from the controller and to generate scan-out data corresponding to the plurality of data items including the second data value,
- wherein the first data value of the at least one data item comprises a first bit value,
- wherein the second data value comprises a second bit value, and
- wherein the replacement command includes a command for inverting the first bit value to the second bit value.
A debugging method of a memory system for detecting an error in at least one data item of a plurality of data items stored in a memory device of the memory system, the debugging method comprising:
- generating, by a processor, a replacement command for a first data value of the at least one data item of the plurality of data items based on a determination of the error existing in the at least one data item of the plurality of data items;
- receiving, by a controller, the replacement command from the processor;
- replacing, by the controller, the first data value of the at least one data item of the plurality of data items with a second data value based on the replacement command;
- receiving, by a scan chain, the plurality of data items including the second data value;
- and
- generating, by the scan chain, scan-out data corresponding to the plurality of data items including the second data value,
- wherein the first data value of the at least one data item comprises a first bit value,
- wherein the second data value comprises a second bit value, and
- wherein the replacement command includes a command for inverting the first bit value to the second bit value.
A debugging device comprising:
- a processor configured to generate a replacement command based on a determination that an error exists in at least one data item of a plurality of data items stored in a memory;
- a controller configured to receive the replacement command from the processor and to replace a first data value of the at least one item of the plurality of data items with a second data value;
- and
- a scan chain configured to receive, from the controller, the plurality of data items including the second data value and to generate scan-out data corresponding to the plurality of data items including the second data value,
- wherein the first data value of the at least one data item comprises a first bit value,
- wherein the second data value comprises a second bit value, and
- wherein the replacement command includes a command for inverting the first bit value to the second bit value.
Dependencies are inferred from the claim text.