Hardware implemented data layer for processing compressed columnar data
AssigneeMicrosoft Technology Licensing, LLC
InventorsRunbin Shi, Conor John Cunningham, Blake Douglas Pelton
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AssigneeMicrosoft Technology Licensing, LLC
InventorsRunbin Shi, Conor John Cunningham, Blake Douglas Pelton
Estimating the term…
An integrated circuit and method are disclosed for processing of compressed columnar data. The processing of compressed columnar data includes loading compressed columnar data associated with a first and a second column into a first on-chip buffer, performing time-shared processing of the compressed columnar data from the first on-chip buffer into a second on-chip buffer, transcoding the compressed columnar data from the second on-chip buffer into unified columnar data having a unified format, loading the unified columnar data into a third on-chip buffer so that the unified columnar data are logically aligned in the third on-chip buffer, and providing at least a portion of the unified columnar data to a query operator. The integrated circuit includes a column loader, a balancer, a transcoder, and a decoder for performing processing of the compressed columnar data.
An integrated circuit for line-rate processing of compressed columnar data, the integrated circuit comprising:
A method for line-rate processing of compressed columnar data using an integrated circuit, the method comprising:
Dependencies are inferred from the claim text.