Computer memory expansion device and method of operation

A memory expansion device operable in a computer system, the computer system including a host computer (host) and a dedicated bus, the memory expansion device comprising:

• interface circuitry configured to communicate with the host via the dedicated bus based on a predefined protocol;
• a non-volatile memory (NVM) subsystem;
• local memory providing a coherent memory space accessible by the host;
• cache memory;
• and
• control logic coupled to the interface circuitry the cache memory, and the NVM subsystem, wherein the control logic is configurable to:
• receive a submission from the host, the submission including a read command and a payload defined by a payload specification in the NVM subsystem;
• determine a priority of the submission based on the payload specification, wherein the submission is of a first priority if the submission is to resolve a page fault at the host, the submission is of a second priority if the submission is to fetch data from storage, and submission is of a third priority if the submission is to prefetch data from storage;
• and
• performing a read process of a plurality of read processes in response to determining the priority of the submission, wherein the read process is based on the priority of the submission and is one or more of a demand read process, a predictive read process, and a speculative read process, and each of the read processes includes indicating completion of the submission.

A method, comprising:

• at a memory expansion device coupled to a host computer (host) via a dedicated bus, the memory expansion device comprising interface circuitry configured to communicate with the host via the dedicated bus based on a predefined protocol, a non-volatile memory (NVM) subsystem, local memory providing a coherent memory space accessible by the host, and cache memory,
• receiving a submission from the host, the submission including a read command and a payload defined by a payload specification in the NVM subsystem;
• determining a priority of the submission based on the payload specification, wherein the submission is of a first priority if the submission is to resolve a page fault at the host, the submission is of a second priority if the submission is to fetch data from storage, and submission is of a third priority if the submission is to prefetch data from storage;
• and
• performing a read process of a plurality of read processes in response to determining the priority of the submission, wherein the read process is based on the priority of the submission and is one or more of a demand read process, a predictive read process, and a speculative read process, and each of the read processes includes indicating completion of the submission in response to acquiring ownership of cache lines in a coherent memory space.