Multifunctional self-sustained hosting apparatus and related bidirectional optical sub assembly based on photonic integrated circuit

A bidirectional optical sub assembly based on photonic integrated circuit comprising a multifunctional self-sustained hosting apparatus for photonic integrated circuit and/or related chipset system packaging, wherein said hosting apparatus is configured to unify and integrate at least one photonic integrated circuit and one chipset (9) within a miniaturized single entity, and comprises:

• a processed wafer (1);
• and
• a plurality of cavities (2) embedded on a top surface of the processed wafer (1);
• and
• at least a V-groove (3), which is formed on the top surface of the processed wafer (1) or in a submount (10);
• and
• wherein the submount (10) is attached to a recess in the processed wafer (1), and said recess and said submount (10) are arranged at an adjacent position in relation to at least one cavity (2);
• and
• wherein said V-groove extends from an edge of said processed wafer (1) or said submount (10) toward at least one cavity (2);
• and
• wherein said V-groove (3) is configured for receiving at least an in/out optical fiber (7) and optically align said in/out optical fiber (7) with an optical endface of a chipset (8);
• and characterized in that each cavity (2) is configured to receive at least one from the group consisting of a chipset (9) and an optical lens (15), and the cavities (2) are disposed in an arbitrary orientation across the processed wafer (1);
• and
• the bidirectional optical sub assembly based on photonic integrated circuit further comprises at least an in/out optical fiber (7) connected to the V-groove (3) of said hosting apparatus;
• and
• the bidirectional optical sub assembly based on photonic integrated circuit further comprises the optical endface of a chipset (8) optically connected to an end part of the in/out optical fiber (7) or the optical lens (15) by means of an edge coupling;
• wherein
• the hosting apparatus comprises a radio frequency line (13) embedded on the processed wafer (1) and, optionally, further comprises a direct-current line (4) embedded on the processed wafer (1);
• and wherein
• at least a chipset (9) is connected by at least an electrical connection to the radio frequency line (13).