Partailly guarded switching matrix for automatic electronic test equipment
AssigneeDIT-MCO International Corporation
InventorsDavid Alan Shier, Patrick Noll
Life of this patent
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AssigneeDIT-MCO International Corporation
InventorsDavid Alan Shier, Patrick Noll
Estimating the term…
Systems and Methods for capacitance testing of a unit under test with parasitic capacitance directed to a guard rail. The system includes test points, wherein the plurality of test points are divided into at least two groups; a stimulus source; a first group guard relay electrically connected to each of the test points in a first; a second group guard relay electrically connected to each of the test points in a second; a guard rail coupled to the first group guard relay and the second group guard relay; a first group return relay electrically connected to each of the test points in a first group; a second group return relay electrically connected to each of the test points in a second group; a current measurement rail coupled to the first group return relay and the second group return relay; a current meter coupled to the measurement rail; and a controller.
A system for capacitance testing of a unit under test (UUT), comprising:
A system for capacitance testing of a unit under test (UUT), comprising:
Dependencies are inferred from the claim text.