Packages formed using RDL-last process
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsMing-Fa Chen, Chen-Hua Yu
Life of this patent
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Abstract
A method includes bonding a first device die and a second device die to a substrate, and filling a gap between the first device die and the second device die with a gap-filling material. A top portion of the gap-filling material covers the first device die and the second device die. Vias are formed to penetrate through the top portion of the gap-filling material. The vias are electrically coupled to the first device die and the second device die. The method further includes forming redistribution lines over the gap-filling material using damascene processes, and forming electrical connectors over and electrically coupling to the redistribution lines.
Claims20
A structure comprising:
- a first device die comprising:
- a semiconductor substrate;
- a first passivation layer over the semiconductor substrate;
- a metal pad over the first passivation layer;
- a second passivation layer over and contacting the metal pad and the first passivation layer, wherein a first portion of the second passivation layer has a first top surface lower than a second top surface of the metal pad;
- a gap-filling material comprising:
- a first portion encircling the first device die and contacting sidewalls of the first device die;
- and
- a second portion covering the first device die;
- and
- a conductive feature over the gap-filling material, wherein the conductive feature is electrically coupled to the metal pad.
A structure comprising:
- a device die comprising:
- a conductive pad;
- and
- a passivation layer comprising a portion over the conductive pad;
- a dielectric gap-filling material comprising:
- a first portion encapsulating the device die;
- and
- a second portion overlapping the device die, wherein the first portion and the second portion of the dielectric gap-filling material are formed of a same dielectric material;
- a first conductive via over and contacting a top surface of the conductive pad, wherein the first conductive via comprises an upper portion in the second portion of the dielectric gap-filling material;
- a low-k dielectric layer over and physically contacting the device die and the dielectric gap-filling material;
- and
- a plurality of conductive features in the low-k dielectric layer.
A structure comprising:
- a first device die and a second device die, wherein the first device die comprises a top dielectric layer, wherein the top dielectric layer comprises a first top surface and a second top surface higher than the first top surface;
- a dielectric gap-filling material encapsulating the first device die and the second device die therein, wherein the dielectric gap-filling material contacts both of the first top surface and the second top surface of the top dielectric layer;
- metal vias penetrating through the dielectric gap-filling material to electrically couple to the first device die and the second device die;
- and
- a plurality of redistribution lines over and electrically coupling to the metal vias.
Dependencies are inferred from the claim text.