Semiconductor package with interposer including recess
AssigneeSamsung Electronics Co., Ltd.
InventorsEunsu Lee, Jangwoo Lee, Doyoung Jang
Life of this patent
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Abstract
A semiconductor package includes a first package substrate, a first semiconductor chip provided on the first package substrate, an interposer provided on the first semiconductor chip, and a vertical conductive structure provided on the first package substrate and a side surface of the first semiconductor chip, and connecting the first package substrate and the interposer, the interposer includes a first recess vertically overlapping the first semiconductor chip in a lower portion of the interposer, and a lower surface of the interposer defining the first recess is higher than an upper surface of the vertical conductive structure.
Claims20
A semiconductor package comprising:
- a first package substrate;
- a first semiconductor chip on the first package substrate;
- an interposer on the first semiconductor chip and comprising a first recess in a lower portion thereof, the first recess vertically overlapping the first semiconductor chip;
- a vertical conductive structure on the first package substrate and a side surface of the first semiconductor chip, and connecting the first package substrate and the interposer;
- and
- a first molding layer in the first recess, between the first semiconductor chip and the interposer, and between the first semiconductor chip and the first package substrate,
- wherein a lower surface of the interposer defining the first recess is higher than an upper surface of the vertical conductive structure.
A semiconductor package comprising:
- a first package substrate;
- a first semiconductor chip provided on the first package substrate;
- an interposer provided on the first semiconductor chip;
- a connection terminal provided between the first package substrate and the first semiconductor chip;
- and
- a vertical conductive structure provided on the first package substrate and a side surface of the first semiconductor chip,
- wherein the first package substrate comprises a first pad structure and a second pad structure that are provided in an upper portion of the first package substrate,
- wherein the first pad structure vertically overlaps the connection terminal,
- wherein the second pad structure vertically overlaps the vertical conductive structure,
- wherein the first pad structure comprises a recess,
- wherein the connection terminal fills at least a portion of the recess, and
- wherein a lower surface of the connection terminal is lower than a lower surface of the vertical conductive structure.
A semiconductor package comprising:
- a first package substrate comprising a pad structure provided in an upper portion of the first package substrate;
- a first semiconductor chip provided on the pad structure;
- vertical conductive structures provided on the first package substrate and on side surfaces of the first semiconductor chip;
- a first molding layer covering the first semiconductor chip and an upper surface of the first package substrate;
- an interposer provided on the first semiconductor chip and the vertical conductive structures;
- a second package substrate provided on the interposer;
- a second semiconductor chip provided on the second package substrate;
- and
- a second molding layer covering an upper surface of the second package substrate and the second semiconductor chip,
- wherein the interposer comprises:
- a first part vertically overlapping the first semiconductor chip, and
- a second part surrounding the first part, and
- wherein a thickness of the first part is less than a thickness of the second part.
Dependencies are inferred from the claim text.