Semiconductor device including a through electrode contacting a backside conductive pattern and a frontside conductive pattern and a semiconductor package including the same

A semiconductor device, comprising:

• a semiconductor substrate having a first surface and a second surface opposing each other;
• a front side structure on the first surface of the semiconductor substrate,
• the front side structure including a circuit device including a transistor, a first front side conductive pattern at a first level, a second front side conductive pattern at a second level lower than the first level, and a plurality of circuit interconnection patterns at different levels;
• a back side structure below the second surface of the semiconductor substrate, the back side structure including a first back side conductive pattern and a second back side conductive pattern at a same level;
• a first through electrode penetrating through the semiconductor substrate, the first through electrode contacting the first back side conductive pattern and the first front side conductive pattern;
• a second through electrode penetrating through the semiconductor substrate, the second through electrode contacting the second back side conductive pattern and the second front side conductive pattern, and the second through electrode having a width narrower than a width of the first through electrode,
• wherein the first through electrode is between the first back side conductive pattern and the first front side conductive pattern in a vertical direction,
• wherein the second through electrode is between the second back side conductive pattern and the second front side conductive pattern in the vertical direction,
• wherein the vertical direction is perpendicular to the first surface of the semiconductor substrate,
• wherein an upper surface of the first through electrode is at a higher level than an upper surface of the second through electrode,
• wherein the plurality of circuit interconnection patterns include:
• a plurality of first circuit interconnection patterns disposed at different levels from each other in the vertical direction and disposed at a lower level than the first front side conductive pattern;
• a plurality of second circuit interconnection patterns disposed at different levels from each other in the vertical direction and disposed at the same level as the first front side conductive pattern;
• and
• a plurality of third circuit interconnection patterns disposed at different levels from each other in the vertical direction and disposed at a higher level than the first front side conductive pattern, and
• wherein the second front side conductive pattern is disposed at the same level as one of the plurality of first circuit interconnection patterns.

A semiconductor package, comprising:

• a base substrate;
• a first semiconductor device on the base substrate,
• the first semiconductor device including a semiconductor substrate, a front side structure, a back side structure, a first through electrode, and a second through electrode,
• the semiconductor substrate having a first surface and a second surface opposing each other,
• the front side structure including a circuit device including a transistor, a first front side conductive pattern at a first level, a second front side conductive pattern at a second level lower than the first level, a plurality of circuit interconnection patterns at different levels, a lower insulating structure on the first surface of the semiconductor substrate, a first insulating structure including a first inter-metal dielectric layer having a first dielectric constant less than a dielectric constant of silicon oxide on the lower insulating structure, a second insulating structure including a second inter-metal dielectric layer having a second dielectric constant less than the first dielectric constant on the first insulating structure, and a third insulating structure on the second insulating structure,
• a thickness of the first front side conductive pattern being greater than a thickness of the second front side conductive pattern,
• the back side structure being below the second surface of the semiconductor substrate, the back side structure including a first back side conductive pattern and a second back side conductive pattern at a same level,
• the first front side conductive pattern being in contact with the first through electrode and penetrating through at least the second insulating structure,
• the first through electrode penetrating through the semiconductor substrate, the first through electrode contacting the first back side conductive pattern and the first front side conductive pattern,
• the first through electrode including a lower portion in contact with the first back side conductive pattern, a first portion of the first through electrode penetrating through the lower insulating structure, and a second portion of the first through electrode penetrating through the first insulating structure,
• the second through electrode penetrating through the semiconductor substrate, the second through electrode contacting the second back side conductive pattern and the second front side conductive pattern, and a width of the second through electrode being narrower than a width of the first through electrode;
• a second semiconductor device on the first semiconductor device;
• first connection patterns electrically connecting the base substrate to the first semiconductor device, the first connection patterns being between the base substrate and the first semiconductor device;
• and
• second connection patterns electrically connecting the first semiconductor device to the second semiconductor device, the second connection patterns being between the first semiconductor device and the second semiconductor device.