Dielectric bondable chiplet for package architecture including reset via simplification
AssigneeIntel Corporation
InventorXavier F. Brun
Life of this patent
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Abstract
Embodiments described herein include electronic packages. In an embodiment, an electronic package comprises a die and a through substrate via that passes through the die. In an embodiment, the through substrate via is coupled to a backside pad on the die. In an embodiment, a first layer is over the backside pad, where the first layer comprises a first dielectric material. In an embodiment, a second layer is over the first layer, where the second layer comprises a second dielectric material. In an embodiment, a via is through the first layer and the second layer.
Claims14
An electronic package, comprising:
- a die;
- a through substrate via that passes through the die, wherein the through substrate via is coupled to a backside pad on the die;
- a first layer beneath the backside pad, wherein the first layer comprises a first dielectric material;
- a second layer beneath the first layer, wherein the second layer comprises a second dielectric material;
- and
- a via through the first layer and the second layer, the via having a bottommost surface at a same level as a bottommost surface of the second layer.
An electronic system, comprising:
- a board;
- a package substrate coupled to the board;
- and
- a die module coupled to the package substrate, wherein the die module comprises:
- a die;
- a through substrate via that passes through the die, wherein the through substrate via is coupled to a backside pad on the die;
- a first layer beneath the backside pad, wherein the first layer comprises a first dielectric material;
- a second layer beneath the first layer, wherein the second layer comprises a second dielectric material;
- and
- a via through the first layer and the second layer, the via having a bottommost surface at a same level as a bottommost surface of the second layer.
An electronic package, comprising:
- a die coupled to a second die;
- a through substrate via that passes through the die, wherein the through substrate via is coupled to a backside pad on the die;
- a first layer beneath the backside pad, wherein the first layer comprises a first dielectric material;
- a second layer beneath the first layer, wherein the second layer comprises a second dielectric material;
- and
- a via through the first layer and the second layer;
- a pillar adjacent to the die;
- a pad coupled to the pillar, wherein the second layer contacts the pad;
- and
- a second via through the second layer, wherein the second via contacts the pad.
Dependencies are inferred from the claim text.