Inverting wafer and etching back plane to expose conductive pillars from back plane of wafer for further processing
AssigneeChangxin Memory Technologies, Inc.
InventorZengyan Fan
Life of this patent
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AssigneeChangxin Memory Technologies, Inc.
InventorZengyan Fan
Estimating the term…
A semiconductor structure, a method for preparing the semiconductor structure and a memory are provided. The method includes: providing a wafer in which multiple conductive pillars are formed; inverting the wafer and performing etching on a back plane of the wafer to expose each conductive pillar from the back plane of the wafer, and lengths of the multiple conductive pillars exposed to the back plane are different; depositing an insulation layer on the back plane of the wafer and the conductive pillars, and depositing a filling layer on the insulation layer, the filling layer completely covering back ends of the multiple conductive pillars; and performing polishing on the filling layer and back ends of a part of the conductive pillars, until a back end of each conductive pillar is exposed and the back ends of the multiple conductive pillars are flush with a back plane of the filling layer.
A method for preparing a semiconductor structure, comprising:
A method for preparing a semiconductor structure, comprising:
Dependencies are inferred from the claim text.