Display device having a semiconductor layer structure including a third portion extending in a third direction directly connecting to a first portion and a second portion that extend in different directions

A display device, comprising:

• a substrate;
• a first transistor on the substrate and including a first semiconductor portion, the first semiconductor portion including a source region, a channel region, and a drain region sequentially arranged in a first direction;
• a second transistor on the substrate and including a second semiconductor portion, the second semiconductor portion including a source region, a channel region, and a drain region sequentially arranged in a second direction crossing the first direction;
• a third semiconductor portion on the substrate and between the first semiconductor portion and the second semiconductor portion, the third semiconductor portion being directly connected to the first semiconductor portion and the second semiconductor portion;
• an insulating layer on the first semiconductor portion, the second semiconductor portion, and the third semiconductor portion, the insulating layer defining a first contact hole overlapping the third semiconductor portion;
• and
• a connector on the insulating layer and electrically connected to the third semiconductor portion via the first contact hole,
• wherein the first semiconductor portion extends horizontally and the second semiconductor portion extends vertically,
• wherein the third semiconductor portion directly connects the horizontal first semiconductor portion to the vertical second semiconductor portion and extends in an oblique direction therebetween, with respect to the horizontal and vertical directions, and
• wherein the third semiconductor portion has a maximum width measured in a direction perpendicular to the oblique direction, wherein the first contact hole overlaps a portion of the third semiconductor portion that has the maximum width, and wherein the maximum width of the third semiconductor portion is greater than a maximum width of the first semiconductor portion that is measured in the vertical direction.