Trench field effect transistor having improved electrical performance

A trench field effect transistor (FET) comprising:

• a substrate having a top surface and a bottom surface wherein the substrate comprises one of silicon carbide, gallium nitride, gallium arsenide, or indium phosphide;
• a patterned layer comprising a plurality of trenches etched in the top surface of the substrate, wherein a layer of material is in the plurality of trenches, wherein the material comprises elemental carbon, and wherein a height of the layer of material is less than a height of sidewalls of the patterned layer;
• an epitaxial buffer layer on the patterned layer, wherein the epitaxial buffer layer is grown by epitaxial lateral overgrowth, wherein exposed portions of the sidewalls of the patterned layer supports lateral growth extending from the sidewalls of the patterned layer that merges to form a portion of a surface of the epitaxial buffer layer that is single crystal with the substrate, and wherein the surface of the epitaxial buffer layer overlies the layer of material in the patterned layer:
• an epitaxial device layer overlying the patterned layer;
• a device body layer overlying the epitaxial device layer;
• a trench formed through the device body layer into at least a portion of the epitaxial device layer;
• an oxide layer overlying the trench bottom in the epitaxial device layer wherein the oxide layer is curved corresponding to the shape of the trench bottom;
• a gate oxide on at least one wall of the trench;
• a source region in the device body layer;
• and
• a gate electrode, a source electrode, and a drain electrode respectively coupled to the gate oxide, the source region, and the epitaxial device layer.

A trench field effect transistor (FET) comprising:

• a substrate having a top surface and a bottom surface wherein the substrate comprises one of silicon carbide, gallium nitride, gallium arsenide, or indium phosphide;
• a patterned layer overlying the substrate comprising a plurality of trenches etched in the top surface of the substrate to form a plurality of pillars, a layer of elemental carbon overlying a bottom surface of the plurality of trenches wherein the elemental carbon absorbs energy at a wavelength that is transparent to the substrate;
• an epitaxial buffer layer on the patterned layer, wherein a portion of a surface of the epitaxial buffer layer comprises epitaxy overlying the layer of elemental carbon that is single crystal with the substrate;
• an epitaxial device layer;
• a device body layer overlying the epitaxial device layer;
• a trench formed through the device body layer into at least a portion of the epitaxial device layer;
• an oxide layer overlying the trench bottom in the epitaxial device layer;
• a source region in the device body layer;
• a gate oxide on at least one wall of the trench;
• and
• a gate electrode, a source electrode, and a drain electrode respectively coupled to the gate oxide, the source region, and the epitaxial device layer.