Multi-stage etching process for contact formation in a semiconductor device
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsShu-Wen Chen, Guan-Ren Wang, Ching-Feng Fu
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Abstract
A method of fabricating a semiconductor device is disclosed. The method includes separating an interlayer dielectric (ILD) into a plurality of portions. The plurality of portions of ILD, separated from each other along a first lateral direction and a second lateral direction, overlay a plurality of groups of epitaxial regions, respectively. The method includes performing an etching process to expose the plurality of groups of epitaxial regions, wherein the etching process comprises a plurality of stages, each of the stages comprising a respective etchant. The method includes forming a plurality of conductive contacts electrically coupled to the plurality of epitaxial regions, respectively.
Claims20
A method of fabricating a semiconductor device, comprising:
- performing a first stage of etching process to remove an upper portion of an interlayer dielectric (ILD) that overlays a plurality of epitaxial regions;
- performing a second stage of etching process to selectively remove an isolation structure disposed between the epitaxial regions, thereby exposing a sidewall of a lower portion of the ILD remaining over the epitaxial regions;
- and
- performing a third stage of etching process to remove the lower portion of the ILD, thereby exposing the epitaxial regions.
A method of fabricating a semiconductor device, comprising:
- forming the semiconductor device that includes:
- a pair of epitaxial structures,
- an isolation structure interposed between the epitaxial structures, and
- an interlayer dielectric (ILD) overlaying the isolation structure and the epitaxial structures,
- performing a first etching process to remove an upper portion of the ILD to expose the isolation structure;
- performing a second etching process to remove an upper portion of the isolation structure, thereby exposing a sidewall of a lower portion of the ILD overlaying the epitaxial structures;
- and
- performing a third etching process to selectively remove the lower portion of the ILD, thereby exposing the epitaxial structures.
A method of fabricating a semiconductor device, comprising:
- performing a first isotropic dry etching process to remove an upper portion of an interlayer dielectric (ILD) that overlays a pair of epitaxial regions
- performing a second isotropic dry etching process to selectively remove an isolation structure disposed between the epitaxial regions, thereby exposing a sidewall of a lower portion of the ILD remaining over the epitaxial regions;
- performing an anisotropic dry etching process to remove the lower portion of the ILD, thereby exposing the epitaxial regions in a trench;
- and
- forming a conductive contact to fill the trench.
Dependencies are inferred from the claim text.