Power semiconductor device, method of producing a power semiconductor device and method of operating a power semiconductor device

A power semiconductor device, comprising:

• a semiconductor body coupled to a first load terminal at a first side and to a second load terminal at a second side that is opposite to the first side with respect to a vertical direction, wherein the semiconductor body has a thickness corresponding to a distance between the first side and the second side along the vertical direction, wherein the semiconductor body comprises an active region configured to conduct a load current between the first load terminal and the second load terminal;
• at the first side and electrically isolated from the first load terminal and the second load terminal, first control electrodes configured to control the load current in first semiconductor channel structures formed in the active region at the first side;
• and
• at the second side and electrically isolated from the first load terminal and the second load terminal, second control electrodes configured to control the load current in second semiconductor channel structures formed in the active region at the second side,
• wherein the first control electrodes are arranged in first control trenches that extend from the first side into the semiconductor body along the vertical direction,
• wherein the second control electrodes are formed as planar electrodes in a region below, with respect to the vertical direction, the second side,
• wherein at the second side and in a contiguous area of modified control (AMC) belonging to the active region and having a lateral extension of at least 30% of the semiconductor body thickness, either no second control electrodes are provided or the second control electrodes are less effective in removing free charge carriers out of the power semiconductor device than the second control electrodes outside the AMC.

A method of producing a power semiconductor device, the method comprising:

• forming a semiconductor body coupled to a first load terminal at a first side and to a second load terminal at a second side that is opposite to the first side with respect to a vertical direction, wherein the semiconductor body has a thickness corresponding to a distance between the first side and the second side along the vertical direction, and wherein the semiconductor body comprises an active region configured to conduct a load current between the first load terminal and the second load terminal;
• at the first side and electrically isolated from the first load terminal and the second load terminal, forming first control electrodes configured to control the load current in first semiconductor channel structures formed in the active region at the first side, wherein the first control electrodes are arranged in first control trenches that extend from the first side into the semiconductor body along the vertical direction;
• at the second side and electrically isolated from the first load terminal and the second load terminal, forming second control electrodes configured to control the load current in second semiconductor channel structures formed in the active region at the second side, wherein the second control electrodes are formed as planar electrodes in a region below, with respect to the vertical direction, the second side;
• and
• carrying out an activation processing step with respect to implanted regions in the semiconductor body based on at least one laser thermal anneal processing step.

A power semiconductor device, comprising:

• a semiconductor body coupled to a first load terminal at a first side and to a second load terminal at a second side that is opposite to the first side with respect to a vertical direction, wherein the semiconductor body has a thickness corresponding to a distance between the first side and the second side along the vertical direction, wherein the semiconductor body comprises an active region configured to conduct a load current between the first load terminal and the second load terminal;
• at the first side and electrically isolated from the first load terminal and the second load terminal, first control electrodes configured to control the load current in first semiconductor channel structures formed in the active region at the first side;
• at the second side and electrically isolated from the first load terminal and the second load terminal, second control electrodes configured to control the load current in second semiconductor channel structures formed in the active region at the second side;
• and
• a first barrier region of a same conductivity type as a drift region of the semiconductor body,
• wherein the first control electrodes are arranged in first control trenches that extend from the first side into the semiconductor body along the vertical direction,
• wherein the second control electrodes are formed as planar electrodes in a region below, with respect to the vertical direction, the second side,
• wherein the first barrier region is arranged, with respect the vertical direction, below the first semiconductor channel structures and above the drift region.

A power semiconductor device, comprising:

• a semiconductor body coupled to a first load terminal at a first side and to a second load terminal at a second side that is opposite to the first side with respect to a vertical direction, wherein the semiconductor body has a thickness corresponding to a distance between the first side and the second side along the vertical direction, wherein the semiconductor body comprises an active region configured to conduct a load current between the first load terminal and the second load terminal;
• at the first side and electrically isolated from the first load terminal and the second load terminal, first control electrodes configured to control the load current in first semiconductor channel structures formed in the active region at the first side;
• and
• at the second side and electrically isolated from the first load terminal and the second load terminal, second control electrodes configured to control the load current in second semiconductor channel structures formed in the active region at the second side,
• wherein the first control electrodes are arranged in first control trenches that extend from the first side into the semiconductor body along the vertical direction,
• wherein the second control electrodes are formed as planar electrodes in a region below, with respect to the vertical direction, the second side,
• wherein the first control electrodes are configured to be subjected to a first control signal,
• wherein the second control electrodes are configured to be subjected to a second control signal different from the first control signal,
• wherein the second control electrodes are additionally provided at the first side.