Reverse blocking insulated-gate bipolar transistor
AssigneeLittelfuse, Inc.
InventorPeter Waind
Life of this patent
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Abstract
Methods for making reverse-blocking insulated gate bipolar transistors and associated structures. A first and a second silicon wafer substrates are provided and bonded. One or more separation diffusion regions are formed in the first silicon wafer substrate. One or more front side metal-oxide semiconductor (MOS) structures are formed on a top surface of the first silicon wafer substrate. The second silicon wafer substrate layer is removed. A contact diffusion layer is formed on a bottom surface of the first silicon wafer substrate. A backside metallization layer is formed on a bottom surface of the contact diffusion layer.
Claims26
A method, comprising:
- providing a first and a second silicon wafer substrates;
- bonding the first and second silicon wafer substrates, wherein the bonding the first and second silicon wafer substrates includes diffusing one or more particles from the second silicon wafer substrate into the first silicon wafer substrate to form a diffusion region;
- forming one or more separation diffusion regions in the first silicon wafer substrate;
- forming one or more front side metal-oxide semiconductor (MOS) structures on a top surface of the first silicon wafer substrate;
- removing the second silicon wafer substrate;
- forming a contact diffusion layer on a bottom surface of the first silicon wafer substrate;
- and
- forming a backside metallization layer on a bottom surface of the contact diffusion layer.
A semiconductor device, comprising:
- a first silicon wafer substrate having a diffusion region, the diffusion region is formed by
- bonding the first silicon wafer substrate to a second silicon wafer substrate, wherein the bonding of the first and second silicon wafer substrates includes diffusing one or more particles from the second silicon wafer substrate into the first silicon wafer substrate to form the diffusion region,
- wherein the second silicon wafer substrate is removed;
- one or more separation diffusion regions formed in the first silicon wafer substrate;
- one or more front side metal-oxide semiconductor (MOS) structures on a top surface of the first silicon wafer substrate;
- a contact diffusion layer formed on a bottom surface of the first silicon wafer substrate;
- and
- a backside metallization layer formed on a bottom surface of the contact diffusion layer.
Dependencies are inferred from the claim text.