3D DRAM memory

A semiconductor structure, comprising:

• a first base, wherein the first base comprises a bit line, a transistor, and a first contact structure that are stacked;
• and
• a second base, bonded with the first base, wherein the second base comprises a second contact structure and a capacitor that are stacked, and the second contact structure is in contact with the first contact structure in an aligned manner, wherein
• the first contact structure has a first surface facing the second base and a second surface opposite to the first surface, and an area of the first surface is larger than an area of the second surface;
• and
• the second contact structure has a third surface facing the first base and a fourth surface opposite to the third surface, and an area of the third surface is larger than an area of the fourth surface;
• wherein the transistor is a vertical transistor comprising a source, a channel region, and a drain that are sequentially stacked on the bit line;
• the drain is connected to the first contact structure;
• the first base further comprises a word line connected to the channel region;
• the bit line extends along a first direction, the word line extends along a second direction, and the first direction is different from the second direction.