Method for fabricating semiconductor structure and semiconductor structure

Abstract

Embodiments provide a method for fabricating a semiconductor structure and a semiconductor structure. The method includes: providing a substrate; forming, on a surface of the substrate, stacked structures arranged at intervals in a first direction and a first isolation layer located between adjacent stacked structures, the stacked structure including a first interlayer dielectric layer, an initial active layer, and a second interlayer dielectric layer; etching a portion of the initial active layer to form a first trench; forming a metal conductive layer in the first trench, the metal conductive layer being in contact connection with the remained initial active layer; and etching a portion of the metal conductive layer to form lower electrode structures arranged in an array in the first direction and a second direction, where the first direction is perpendicular to the surface of the substrate, and the second direction is parallel to the surface of the substrate.

Dependencies are inferred from the claim text.