Column ramp buffer design to improve ADC range in cis

An imaging system, comprising:

• a pixel array configured to generate a plurality of image charge voltage signals in response to incident light;
• and
• readout circuitry coupled to the pixel array, the readout circuitry including a ramp generator configured to generate a ramp signal, and a plurality of column unit cells coupled to receive the ramp signal from the ramp generator and the image charge voltage signals from the pixel array, wherein each column unit cell comprises a column ramp buffer and a column comparator, and wherein each column ramp buffer comprises:
• an input node coupled to receive the ramp signal from the ramp generator;
• a transistor having a gate terminal coupled to the input node and a drain terminal coupled to a power line;
• an output node coupled between a source terminal of the transistor and the column comparator;
• and
• an alternating current (AC) coupling unit coupled between the input node and the transistor, the AC coupling unit comprising:
• a capacitor coupled between the input node and the gate terminal of the transistor;
• and
• a reset switch coupled between the input node and the gate terminal of the transistor, wherein the reset switch is coupled to the capacitor in parallel.