Adapter for an automation field device designed for linking to highway addressable remote transducer (HART) or 4-20 mA communications loop connected to field device

A high-speed serial interface configured to be implemented at a receive end, wherein the high-speed serial interface comprises:

• a serial/deserializer (SerDes);
• a first physical layer (PHY) circuit comprising first partial modules, wherein the first partial modules do not comprise all modules of the first PHY circuit;
• a clock gating circuit coupled to the first PHY circuit and configured to send a clock signal to the first PHY circuit;
• and
• a bitstream detection circuit coupled to the SerDes, the first PHY circuit, and the clock gating circuit and configured to:
• receive, through the SerDes, a first control bitstream, wherein the first control bitstream indicates that a transmit end has turned off second partial modules in a second PHY circuit at the transmit end, indicates that the transmit end is to turn off the second partial modules, or instructs the receive end to turn off the first partial modules, and wherein the second partial modules do not comprise all modules of the second PHY circuit;
• instruct the clock gating circuit to stop sending the clock signal to the first partial modules;
• stop sending the clock signal to the first partial modules;
• and
• receive, through the SerDes, a random bitstream after receiving the first control bitstream.

A method, applied to a high-speed serial interface at a transmit end, comprising:

• sending a first control bitstream when the transmit end is not sending service data, wherein the first control bitstream indicates that the transmit end has turned off first partial modules in a first physical layer (PHY) circuit at the transmit end, indicates that the transmit end is to turn off the first partial modules, or instructs a receive end to turn off second partial modules in a second PHY circuit at the receive end, wherein the first partial modules do not comprise all modules of the first PHY circuit, and wherein the second partial modules do not comprise all modules of the second PHY circuit;
• turning off the first partial modules;
• and
• sending a random bitstream after the second partial modules in the second PHY circuit at the receive end are turned off.

A method, applied to a high-speed serial interface at a receive end, the method comprising:

• receiving a first control bitstream, wherein the first control bitstream indicates that a transmit end has turned off first partial modules in a first physical layer (PHY) circuit at the transmit end, indicates that the transmit end is to turn off the first partial modules, or instructs the receive end to turn off second partial modules in a second PHY circuit at the receive end, wherein the first partial modules do not comprise all modules of the first PHY circuit, and wherein the second partial modules do not comprise all modules of the second PHY circuit;
• turning off the second partial modules;
• and
• receiving a random bitstream after the second partial modules in the second PHY circuit at the receive end are turned off.

A computer program product comprising instructions stored on a non-transitory computer-readable storage medium that, when executed by one or more processors, cause an electronic device configured to be implemented at a transmit end to:

• send a first control bitstream when the transmit end is not sending service data, wherein the first control bitstream indicates that the transmit end has turned off first partial modules in a first physical layer (PHY) circuit at the transmit end, indicates that the transmit end is to turn off the first partial modules, or instructs a receive end to turn off second partial modules in a second PHY circuit at the receive end, wherein the first partial modules do not comprise all modules of the first PHY circuit, and wherein the second partial modules do not comprise all modules of the second PHY circuit;
• turn off the first partial modules;
• and
• send a random bitstream after the electronic device sends the first control bitstream.

A computer program product comprising instructions stored on a non-transitory computer-readable storage medium that, when executed by one or more processors, cause an electronic device configured to be implemented at a receive end to:

• receive a first control bitstream, wherein the first control bitstream indicates that a transmit end has turned off first partial modules in a first physical layer (PHY) circuit at the transmit end, indicates that the transmit end is to turn off the first partial modules, or instructs the receive end to turn off second partial modules in a second PHY circuit at the receive end, wherein the first partial modules do not comprise all modules of the first PHY circuit, and wherein the second partial modules do not comprise all modules of the second PHY circuit;
• turn off the second partial modules;
• and
• receive a random bitstream after the second partial modules in the second PHY circuit at the receive end are turned off.