Low-latency delta-sigma modulator

A circuit comprising:

• a multi-bit delta-sigma modulator having a first terminal and a second terminal;
• an interpolation circuit having a first terminal and a second terminal, the first terminal of the interpolation circuit coupled to the second terminal of the multi-bit delta-sigma modulator;
• a filter having a first terminal and a second terminal, the first terminal of the filter coupled to the second terminal of the interpolation circuit;
• a digital delta-sigma modulator having a first terminal and a second terminal, the first terminal of the digital delta-sigma modulator coupled to the second terminal of the filter;
• and
• isolation circuitry having a first terminal and a second terminal, the first terminal of the isolation circuitry coupled to the second terminal of the digital delta-sigma modulator.

A circuit comprising:

• multi-bit analog-to-digital conversion circuitry configured to convert an analog input signal to a multi-bit signal;
• an interpolation circuit coupled to the multi-bit analog-to-digital conversion circuitry and configured to interpolate the multi-bit signal, resulting in an interpolated signal;
• a filter coupled to the interpolation circuit and configured to filter the interpolated signal, resulting in a filtered signal;
• a digital delta-sigma modulator coupled to the filter and configured to digitize the filtered signal;
• and
• isolation circuitry coupled to the digital delta-sigma modulator and configured to isolate a digital output of the digital delta-sigma modulator between different ground potentials.