Sampling methods and systems
AssigneeAlphacore, Inc.
InventorsSachin Namboodiri, Phaneendra Bikkina
Life of this patent
Estimating the term…
Abstract
Embodiments of a sampling system and a method for sampling are disclosed. In an embodiment, a sampling system includes sampling cells, the sampling cells are distributed into sampling channels, and the sampling cells in the sampling channels are driven by sampling clock pulses with respective phase offsets.
Claims19
A sampling system, the sampling system comprising:
- a plurality of sampling cells,
- wherein the sampling cells are distributed into a plurality of sampling channels,
- wherein the sampling cells in the sampling channels are driven by a plurality of sampling clock pulses with a plurality of respective phase offsets;
- and
- a clock circuit configured to generate the sampling clock pulses with the respective phase offsets, wherein the clock circuit comprises an interpolator configured to generate the respective phase offsets for the sampling clock pulses.
A multi-channel sampling system, the multi-channel sampling system comprising:
- a plurality of sampling cells, wherein the sampling cells are evenly distributed into a plurality of sampling channels such that each of the sampling channels contains an identical number of sampling cells, and wherein the sampling cells in the sampling channels are driven by a plurality of sampling clock pulses with a plurality of respective phase offsets;
- and
- a clock circuit configured to generate the sampling clock pulses with the respective phase offsets, wherein all sampling cells in each of the sampling channels are driven by a sampling clock pulse with a specific phase offset of the sampling clock pulses, and wherein the clock circuit comprises an interpolator configured to generate the respective phase offsets for the sampling clock pulses that are tunable to adjust a plurality of timing delays between the sampling channels.
A method for sampling, the method comprising:
- using a clock circuit, generating a plurality of sampling clock pulses with a plurality of respective phase offsets, wherein using the clock circuit, generating the sampling clock pulses with the respective phase offsets comprises using an interpolator of the clock circuit, generating the respective phase offsets for the sampling clock pulses;
- and
- driving a plurality of sampling cells distributed in a plurality of sampling channels using the sampling clock pulses to capture and store a plurality of analog values at a plurality of discrete time intervals.
A sampling system, the sampling system comprising:
- a plurality of sampling cells,
- wherein the sampling cells are distributed into a plurality of sampling channels,
- wherein the sampling cells in the sampling channels are driven by a plurality of sampling clock pulses with a plurality of respective phase offsets,
- wherein each of the sampling cells comprises a sampling switch, a capacitor, a buffer, a readout switch, and a delay cell, and
- wherein the sampling switch and the capacitor are configured to capture and store analog data, and wherein the readout switch and the buffer are configured to read the stored analog data.
A multi-channel sampling system, the multi-channel sampling system comprising:
- a plurality of sampling cells, wherein the sampling cells are evenly distributed into a plurality of sampling channels such that each of the sampling channels contains an identical number of sampling cells, and wherein the sampling cells in the sampling channels are driven by a plurality of sampling clock pulses with a plurality of respective phase offsets;
- and
- a clock circuit configured to generate the sampling clock pulses with the respective phase offsets, wherein all sampling cells in each of the sampling channels are driven by a sampling clock pulse with a specific phase offset of the sampling clock pulses,
- wherein each of the sampling cells comprises a sampling switch, a capacitor, a buffer, a readout switch, and a delay cell,
- wherein the sampling switch and the capacitor are configured to capture and store analog data, and wherein the readout switch and the buffer are configured to read the stored analog data.
Dependencies are inferred from the claim text.