Quasi true time delay

A method comprising:

• providing control signals to a first plurality of main switches arranged along a first programmable reflective load line of an integrated circuit to (i) open any main switch of the first plurality of main switches that is nearer to a first input of the first programmable reflective load line than a selected main switch of the first plurality of main switches and (ii) close the selected main switch and any main switch of the first plurality of main switches that is further from the first input than the selected main switch;
• providing control signals to a first plurality of sub-delay switches of the first programmable reflective load line of the integrated circuit to (i) open any sub-delay switch of the first plurality of sub-delay switches that is nearer to the selected main switch of the first programmable reflective load line than a selected sub-delay switch of the first plurality of sub-delay switches and (ii) close the selected sub-delay switch and any sub-delay switch of the first plurality of sub-delay switches that is further from the selected main switch than the selected sub-delay switch;
• and
• transmitting a signal along the first programmable reflective load line, wherein the signal travels from the first input, through a number of main delay segments of the first programmable reflective load line arranged between the first input and the selected main switch, through the selected main switch, through a number of sub-delay segments of the first programmable reflective load line arranged between the selected main switch and the selected sub-delay switch, through the selected sub-delay switch, to ground, and then returns along the reverse path.