Fake fast plane detection in early program termination

A controller in communication with a memory apparatus including memory cells grouped into a plurality of planes including a first plane and a second plane and configured to retain a threshold voltage corresponding to data states, the controller configured to:

• instruct the memory apparatus to apply one of a plurality of program pulses followed by a verify pulse of at least one verify voltage corresponding to one of the data states to a group of the memory cells of the first plane and the second plane during one of a plurality of program-verify iterations;
• and
• instruct the memory apparatus to terminate programming of one of the first plane or the second plane prior to completing programming of the one of the first plane or the second plane in response to determining the one of first plane or the second plane programs slower than another of the first plane or the second plane, the one of the first plane or the second plane being terminated additionally determined based on sensing the threshold voltage of the memory cells of the one of the first plane or the second plane for a long sense time longer than used during the one of the plurality of program-verify iterations.

A method of operating a memory apparatus including memory cells grouped into a plurality of planes including a first plane and a second plane and configured to retain a threshold voltage corresponding to data states, the method comprising the steps of:

• applying one of a plurality of program pulses followed by a verify pulse of at least one verify voltage corresponding to one of the data states to a group of the memory cells of the first plane and the second plane during one of a plurality of program-verify iterations;
• and
• terminating programming of one of the first plane or the second plane prior to completing programming of the one of the first plane or the second plane in response to determining the one of first plane or the second plane programs slower than another of the first plane or the second plane, the one of the first plane or the second plane being terminated additionally determined based on sensing the threshold voltage of the memory cells of the one of the first plane or the second plane for a long sense time longer than used during the one of the plurality of program-verify iterations.