Enhanced combination scan management for block families of a memory device
AssigneeMicron Technology, Inc.
InventorsYang Liu, Steven Michael Kientz, Tingjun Xie, Aaron Lee, Jiangli Zhu, Wei Wang
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AssigneeMicron Technology, Inc.
InventorsYang Liu, Steven Michael Kientz, Tingjun Xie, Aaron Lee, Jiangli Zhu, Wei Wang
Estimating the term…
An example memory sub-system includes a memory device and a processing device, operatively coupled to the memory device. The processing device is configured to initiate a scan operation on a plurality of block families of the memory device. Each of the plurality of block families is assigned to a voltage offset bin of a plurality of voltage offset bins. The processing device further determines that a number of scan operations to be performed in one scan interval is greater than a maximum number of scan operations to be performed in a scan interval. The processing device further determines based on the voltage offset bins of the plurality of block families and a time elapsed since execution of a previous scan operation of the plurality of block families, a scan priority of each of the plurality of block families, and schedules, based on the scan priority, a scan operation of one or more block families of the plurality of block families during one or more subsequent scan intervals. Based on the scan result, two or the plurality of block families which are scanned within the same or different intervals can be combined and thus release block family memory if their measurement results satisfy combining criterion.
A system comprising:
A method comprising:
A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to:
Dependencies are inferred from the claim text.