Memory sensing with global counter
AssigneeMacronix International Co., Ltd.
InventorChun-Hsiung Hung
Life of this patent
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Abstract
A circuit is provided. The circuit includes an array of memory cells including a plurality of bit lines and a plurality of word lines, sensing circuits configured to sense a difference between first and second currents on respective bit lines in selected bit lines and to produce outputs for the selected bit lines as a function of the difference, and a global counter configured to continuously provide a count value to each of the sensing circuits in dependence on a clock signal. Each sensing circuit, of the sensing circuits, can produce an output in dependence on (i) the difference between the first and second currents and (ii) a stored count value received from the global counter, the count value being stored in dependence on a value of the difference between the first and second currents.
Claims20
A circuit, comprising:
- an array of memory cells including a plurality of bit lines and a plurality of word lines;
- sensing circuits configured to sense a difference between first and second currents on respective bit lines in selected bit lines and to produce outputs for the selected bit lines as a function of the difference;
- and
- a global counter configured to continuously provide a count value to each of the sensing circuits in dependence on a clock signal,
- wherein each sensing circuit, of the sensing circuits, produces an output, of the outputs, in dependence on (i) the difference between the first and second currents and (ii) a stored count value received from the global counter, the count value being stored in dependence on a value of the difference between the first and second currents.
A method for sensing currents on bits lines of an array of memory cells including a plurality of bit lines and a plurality of word lines and providing digital outputs, the method comprising:
- sensing a difference, using sensing circuits, between first and second currents on respective bit lines in selected bit lines;
- continuously receiving, by the sensing circuits, a count value provided from a global counter in dependence on a clock signal;
- and
- producing, by the sensing circuits, the digital outputs for the selected bit lines as a function of the difference and the count value,
- wherein a digital output, of the digital outputs, is produced by each sensing circuit, of the sensing circuits, in dependence on (i) the difference between the first and second currents and (ii) a stored count value received from the global counter, the count value being stored in dependence on a value of the difference between the first and second currents.
A circuit, comprising:
- sensing circuits configured to sense a difference between first and second currents on respective bit lines, of an array of memory cells, in selected bit lines and to produce outputs for the selected bit lines as a function of the difference, and
- wherein each sensing circuit, of the sensing circuits, produces an output, of the outputs, in dependence on (i) the difference between the first and second currents and (ii) a stored count value received from a global counter configured to continuously provide a count value to each of the sensing circuits in dependence on a clock signal, the count value being stored in dependence on a value of the difference between the first and second currents.
Dependencies are inferred from the claim text.