Nonvolatile memory device, storage device having the same, and operating method thereof

A nonvolatile memory device comprising:

• a first string electrically connected between a first bitline and a common source line;
• a second string electrically connected between a second bitline and the common source line;
• a third string electrically connected between the first bitline and the common source line;
• and
• a fourth string electrically connected between the second bitline and the common source line,
• wherein each of the first, second, third, and fourth strings comprises a first string selection transistor having a gate electrically connected to a first string selection line, a second string selection transistor having a gate electrically connected to a second string selection line, a plurality of memory cells having respective gates electrically connected to respective ones of a plurality of wordlines, and a ground selection transistor having a gate electrically connected to a ground selection line, and each of the plurality of memory cells comprises a ferroelectric material,
• wherein the first string selection line, the second string selection line, the plurality of wordlines, and the ground selection line are sequentially arranged in a direction perpendicular to a substrate,
• wherein the nonvolatile memory device is configured to perform an erase operation in which, based on an address, the first string electrically connected to the first bitline is selected, and the second, third, and fourth strings are unselected,
• wherein, the erase operation is configured such that, a Gate Induced Drain Leakage (GIDL) voltage is applied to the first string selection line and the second string selection line corresponding to the first string and the second string respectively, and
• wherein, the erase operation is configured such that, different shut-off voltages are applied to the first string selection line and the second string selection line corresponding to the third string and the fourth string, respectively.

A method of operating a nonvolatile memory device, the method comprising:

• performing a program operation on a selected memory cell from among a plurality of memory cells of a respective string among a plurality of strings of the nonvolatile memory device using Incremental Step Pulse Programming (ISPP), wherein the plurality of strings extend in a direction perpendicular to a substrate, and are electrically connected between respective bitlines and a common source line, each of the plurality of strings including at least one string selection transistor, a plurality of memory cells corresponding to wordlines, and at least one ground selection transistor, each of the plurality of memory cells comprising a ferroelectric material, the at least one string selection transistor comprising:
• a first string selection transistor having a first gate electrically connected to a first string selection line and a first drain electrically connected to a respective bitline among the bitlines, and
• a second string selection transistor having a second gate electrically connected to a second string selection line, a second drain electrically connected to a first source of the first string selection transistor, and a second source electrically connected to a respective memory cell among the plurality of memory cells;
• and
• performing an erase operation on the selected memory cell using Gate Induced Drain Leakage (GIDL), wherein the performing of the erase operation comprises applying different shut-off voltages to first and second string selection lines corresponding to unselected strings among the plurality of strings.