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US 12,614,572 B2Granted
Semiconductor apparatus and a semiconductor system capable of performing a training operation
AssigneeSK hynix Inc.
InventorsGang Sik Lee, Young Taek Kim, Jae Hyeok Yang
Life of this patent
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Abstract
A semiconductor apparatus includes a Pseudo Random Binary Sequence (PRBS) generation circuit, a first data input and output circuit, and a second data input and output circuit. The PRBS generation circuit generates a PRBS signal and the first and second data input and output circuits receive in common the PRBS signal. The first data input and output circuit scrambles, based on a first scramble code, the PRBS signal to generate a first output data signal and the second data input and output circuit scrambles, based on a second scramble code having different value from the first scramble code, the PRBS signal to generate a second output data signal.
Claims28
A semiconductor apparatus comprising:
- a Pseudo Random Binary Sequence (PRBS) generation circuit configured to generate a PRBS signal;
- a first data input and output circuit including a first scramble circuit configured to scramble, based on a first scramble code, the PRBS signal to generate a first output data signal;
- and
- a second data input and output circuit including a second scramble circuit configured to scramble, based on a second scramble code having different value from the first scramble code, the PRBS signal to generate a second output data signal,
- wherein the semiconductor apparatus is configured to generate the first scramble code and the second scramble code based on a command address signal.
2 more elements
A semiconductor system comprising:
- a first semiconductor apparatus;
- and
- a second semiconductor apparatus coupled to the first semiconductor apparatus through a first data transmission line and a second data transmission line,
- wherein the first semiconductor apparatus includes:
- a first Pseudo Random Binary Sequence (PRBS) generation circuit configured to generate a PRBS signal;
- a first data input and output circuit coupled to the first data transmission line and configured to be assigned with a first scramble code and configured to scramble, based on the first scramble code, the PRBS signal to generate a first output data signal, and configured to generate a first data stream based on the first output data signal and to transmit the first data stream to the second semiconductor apparatus through the first data transmission line, during a first operation;
- and
- a second data input and output circuit coupled to the second data transmission line and configured to be assigned with a second scramble code and configured to scramble, based on the second scramble code, the PRBS signal to generate a second output data signal, and configured to generate a second data stream based on the second output data signal and to transmit the second data stream to the second semiconductor apparatus through the second data transmission line, during the first operation.
5 more elements
A semiconductor apparatus comprising:
- a Pseudo Random Binary Sequence (PRBS) generation circuit configured to generate a PRBS signal;
- a first data input and output circuit configured to be assigned with a first scramble code, configured to scramble, based on a first part of the first scramble code, the PRBS signal to generate a first scrambled signal and configured to scramble, based on a second part of the first scramble code, the first scrambled signal to generate a first output data signal, the first data input and output circuit configured to generate a data stream based on the first output data signal and to transmit the first data stream through a first data transmission line;
- and
- a second data input and output circuit configured to be assigned with a second scramble code, configured to scramble, based on a first part of the second scramble code, the PRBS signal to generate a second scrambled signal and configured to scramble, based on a second part of the second scramble code, the second scrambled signal to generate a second output data signal, the second data input and output circuit configured to generate a data stream based on the second output data signal and to transmit the second data stream through a second data transmission line.
1 more element
A semiconductor apparatus comprising:
- a Pseudo Random Binary Sequence (PRBS) generation circuit configured to generate a PRBS signal;
- a first data input and output circuit configured to be assigned with a first scramble code and configured to scramble, based on at least a part of the first scramble code, the PRBS signal to generate a first output data signal, the first data input and output circuit configured to generate, based on a first output symbol, a first Pulse Amplitude Modulation (PAM) signal and to transmit the first PAM signal to a first data transmission line;
- a second data input and output circuit configured to be assigned with a second scramble code and configured to scramble, based on at least a part of the second scramble code, the PRBS signal to generate a second output data signal, the second data input and output circuit configured to generate, based on a second output symbol, a second PAM signal and to transmit the second PAM signal to a second data transmission line;
- and
- a data encoding circuit configured to encode the first output data signal and the second output data signal to generate the first output symbol and the second output symbol.
2 more elements
Dependencies are inferred from the claim text.